Demo Data from VLDB 2026 / reviewers in the wild / expert
Michael Opoku Agyeman
dblp:82/9609
· DBLP profile ↗
8ranked-venue papers
5as first author
0since 2021 · last 2019
0000-0002-3734-4451ORCID · verified
Domains — the database's venue-derived domains; a paper can count in several
Systems, architecture and hardware · 7 · 5 first-authorSoftware engineering, systems software and programming languages · 1Applied, interdisciplinary, general and emerging computing · 1
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Computer architecture, parallel and distributed computing, and storage systems
2 papers |
Interconnection networks and networks-on-chip · 72% Integrated circuit design · 22% Energy-efficient computing · 6% | |
| Computer networks
1 paper |
Physical-layer communications · 100% |
Topics — the 5 heaviest of 6, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
Interconnection networks and networks-on-chip › network-on-chip design
wireless network-on-chip |
0.3 | 1 | 2017 | A Resilient 2-D Waveguide Communication Fabric for Hybrid Wired-Wireless NoC Design · IEEE Trans. Parallel Distributed Syst. 2017 |
Interconnection networks and networks-on-chip
3d network-on-chip |
0.2 | 1 | 2016 | Performance and Energy Aware Inhomogeneous 3D Networks-on-Chip Architecture Generation · IEEE Trans. Parallel Distributed Syst. 2016 |
Integrated circuit design › 3d integration
through-silicon via |
0.2 | 1 | 2016 | Performance and Energy Aware Inhomogeneous 3D Networks-on-Chip Architecture Generation · IEEE Trans. Parallel Distributed Syst. 2016 |
Physical-layer communications › channel modeling › propagation channel modeling
millimeter-wave channel modeling |
0.1 | 1 | 2017 | A Resilient 2-D Waveguide Communication Fabric for Hybrid Wired-Wireless NoC Design · IEEE Trans. Parallel Distributed Syst. 2017 |
Energy-efficient computing › energy-efficient architecture
network-on-chip power |
0.1 | 1 | 2016 | Performance and Energy Aware Inhomogeneous 3D Networks-on-Chip Architecture Generation · IEEE Trans. Parallel Distributed Syst. 2016 |
Methods — techniques the papers use, named apart from their topics
surface wave transducer design · 0.6channel modeling · 0.6traffic pattern analysis · 0.2topology generation algorithm · 0.2
| Year | Publication | Venue | Position |
|---|---|---|---|
| 2019 | Improving Electricity Network Efficiency and Customer Satisfaction in Generation Constrained Power SystemabstractElectricity situation in generation constrained power systems creates a high level of inconvenience for both utilities and their consumers. In this paper, we examined the causes of the constraints and the mitigating methods being adopted. The demand for electricity cannot be allowed to exceed the available generation as it could cause the entire power system to collapse. Therefore, electricity utilities are motivated to turn off some sections of the network in order to reduce the demand. Lack of funds makes it difficult for such systems to increase their generation capacity. A key concern is the hardship imposed by the sectional blackouts that they create. Smart metering promises an interim solution but the cost of deployment is of great concern. We proposed a smart metering simulation tool which is then used to model a micro-load manageable smart metering system based on certain priorities of loads. Algorithms and optimisation techniques are then developed to micro-load manage the demand so as to maintain some level of customer essential energy requirements. Simulation result shows that the proposed system is efficient in micro-load managing electricity demand. The proposed system has the potential to prevent total blackouts and associated inconveniences as well as improve the efficiency of such power systems. Julius Quarshie Azasoo, Triantafyllos Kanakis, Ali Al-Sherbaz, Michael Opoku Agyeman |
CoDIT | 4 |
| 2018 | Energy and performance-aware application mapping for inhomogeneous 3D networks-on-chip
Michael Opoku Agyeman, Ali Ahmadinia, Nader Bagherzadeh |
J. Syst. Archit. | 1 |
| 2017 | A Resilient 2-D Waveguide Communication Fabric for Hybrid Wired-Wireless NoC DesignabstractHybrid wired-wireless Network-on-Chip (WiNoC) has emerged as an alternative solution to the poor scalability and performance issues of conventional wireline NoC design for future System-on-Chip (SoC). Existing feasible wireless solution for WiNoCs in the form of millimeter wave (mm-Wave) relies on free space signal radiation which has high power dissipation with high degradation rate in the signal strength per transmission distance. Moreover, over the lossy wireless medium, combining wireless and wireline channels drastically reduces the total reliability of the communication fabric. Surface wave has been proposed as an alternative wireless technology for low power on-chip communication. With the right design considerations, the reliability and performance benefits of the surface wave channel could be extended. In this paper, we propose a surface wave communication fabric for emerging WiNoCs that is able to match the reliability of traditional wireline NoCs. First, we propose a realistic channel model which demonstrates that existing mm-Wave WiNoCs suffers from not only free-space spreading loss (FSSL) but also molecular absorption attenuation (MAA), especially at high frequency band, which reduces the reliability of the system. Consequently, we employ a carefully designed transducer and commercially available thin metal conductor coated with a low cost dielectric material to generate surface wave signals with improved transmission gain. Our experimental results demonstrate that the proposed communication fabric can achieve a 5 dB operational bandwidth of about 60 GHz around the center frequency (60 GHz). By improving the transmission reliability of wireless layer, the proposed communication fabric can improve maximum sustainable load of NoCs by an average of 20:9 and 133:3 percent compared to existing WiNoCs and wireline NoCs, respectively. Michael Opoku Agyeman, Quoc-Tuan Vien, Ali Ahmadinia, Alexandre Yakovlev, Kin-Fai Tong, Terrence S. T. Mak |
IEEE Trans. Parallel Distributed Syst. | 1 |
| 2016 | SlideAcross: A Low-Latency Adaptive Router for Chip Multi-processorabstractThe non-uniform distributed traffic of chip multi-processor (CMP) demands an on-chip communication infrastructure which is able to avoid congestion under high traffic conditions while possessing minimal pipeline delay at low load conditions. In this paper, we propose a low-latency adaptive router with a low-complexity single-cycle bypassing mechanism to meet the communication needs of CMPs. At low loads, this router transmits a flit using dimension-ordered routing (DoR) in the bypass datapath. When the output port required intra-dimension bypassing is not available, the packet is routed adaptively to avoid congestion. The router also has a simplified virtual channel allocation (VA) scheme that yields a non-speculative low-latency pipeline. By combining the low-complexity bypassing technique together with adaptive routing, the proposed router architecture can achieve low-latency communication under various traffic loads. Simulation shows that proposed router can reduce applications' execution time by 16.9% in average compared to low-latency router SWIFT. Wen Zong, Liang Wang 0020, Qiang Xu 0001, Michael Opoku Agyeman |
DSD | 4 |
| 2016 | Performance and Energy Aware Inhomogeneous 3D Networks-on-Chip Architecture GenerationabstractRecently, Through-Silicon-Via (TSV) has been more popular to provide faster inter-layer communication in three-dimensional Networks-on-Chip (3D NoCs). However, the area overhead of TSVs reduces wafer utilization and yield which impact design of 3D architectures using a large number of TSVs such as homogeneous 3D NoCs topologies. Also, 3D routers require more memory and thus they are more power hungry than conventional 2D routers. Alternatively, hybrid 3D NoCs combine both the area and performance benefits of 2D and 3D router architectures by using a limited number of TSVs. Existing hybrid architectures suffer from higher packet delays as they do not consider the dynamic communication patterns of different application and their NoC resource usage. We propose a novel algorithm to systematically generate hybrid 3D NoC topologies for a given application such that the vertical connections are minimized while the NoC performance is not sacrificed. The proposed algorithm analyses the target application and generates hybrid architectures by efficiently redistributing the vertical links and buffer spaces based on their utilizations. Furthermore, the algorithm has been evaluated with synthetic and various real-world traffic patterns. Experimental results show that the proposed algorithm generates optimized architectures with lower energy consumption and a significant reduction in packet delay compared to the existing solutions. Michael Opoku Agyeman, Ali Ahmadinia, Nader Bagherzadeh |
IEEE Trans. Parallel Distributed Syst. | 1 |
| 2015 | Novel Hybrid Wired-Wireless Network-on-Chip Architectures: Transducer and Communication Fabric DesignabstractExisting wireless communication interface of Hybrid Wired-Wireless Network-on-Chip (WiNoC) has 3-dimensional free space signal radiation which has high power dissipation and drastically affects the received signal strength. In this paper, we propose a CMOS based 2-dimensional (2-D) waveguide communication fabric that is able to match the channel reliability of traditional wired NoCs as the wireless communication fabric. Our experimental results demonstrate that, the proposed communication fabric can achieve a 5dB operational bandwidth of about 60GHz around the center frequency (60GHz). Compared to existing WiNoCs, the proposed communication fabric can improve the reliability of WiNoCs with average gains of 21.4%, 13.8% and 10.6% performance efficiencies in terms of maximum sustainable load, throughput and delay, respectively. Michael Opoku Agyeman, Wen Zong, Ji-Xiang Wan, Alexandre Yakovlev, Kenneth Tong, Terrence S. T. Mak |
NOCS | 1 |
| 2015 | Unbiased Regional Congestion Aware Selection Function for NoCsabstractAdaptive routing in Network-on-Chip (NoC) selects paths for packets according to network state to reduce packet latency and balance network load. Existing adaptive routing schemes can degrade network performance due to their dependency on either inadequate or outdated network information. We present an adaptive routing scheme in which a router is provided adequate and timely congestion information of the network. A low-complexity routing selection function that considers regional congestion status is proposed. The selection function is unbiased as it considers the same amount of congestion information on both admissible directions. Proposed selection function achieves 18% lower packet latency than local congestion aware selection under realistic workloads. It also reduces regional congestion aware selection logic area and power overhead by 73% and 35% on an 8×8 mesh network. Wen Zong, Michael Opoku Agyeman, Xiaohang Wang 0001, Terrence S. T. Mak |
NOCS | 2 |
| 2013 | Efficient routing techniques in heterogeneous 3D Networks-on-Chip
Michael Opoku Agyeman, Ali Ahmadinia, Alireza Shahrabi |
Parallel Comput. | 1 |