This paper presents a GUI application for analyzing states of a switching fabric, it allows users to create a model of a multi-plane log2N switching fabric and analyze the behavior of different control algorithms. In this type of fabric, a desired path from a specific input to a specific output is determined by input and output numbers, and the algorithm must choose the appropriate plane. Connections sharing elements on the same path are in conflict and need to be realized in different planes. The relationship between connections and parts of their paths creates the internal state of the switching fabric, which can be analyzed using complex formulas and presented in various ways. The presented application simplifies the analysis of the fabric’s state and facilitates the development of more effective algorithms. Additionally, it includes additional tools such as FPGA core preparation, picture creation, and simulation capabilities.

In this paper, a system for testing and detailed analysis of Multi-Path TCP protocol is presented. It consists of hardware and software nodes. Hardware components, such as a professional industrial Ethernet traffic generator and analyzer, real servers, and network modems/routers, can be connected with software (virtual) nodes, such as virtual routers, servers, sources, and sinks of traffic. The availability of unlimited virtual routers allows for the creation of different topologies. These topologies are realized on a high-performance virtualization platform, and their speed can be limited or not limited to given values that are dedicated to particular tests representing real-life situations. This system offers a user-friendly interface, flexibility, and repeatability of configuration.

This paper presents an application - a system of tools for remotely managing a computer networking laboratory. This laboratory contains virtual and physical resources that are interconnected, creating a flexible topology that can be easily modified, primarily through VLAN assignments. Virtual resources (VMs) from multiple servers and physical devices from various rooms are connected using VLANs/VPLS/VPN technologies, forming a unified and flexible laboratory environment. To enhance user-friendliness, a range of interesting mechanisms and tools have been incorporated.

In this article, we present the concept and preliminary implementation of hardware simulation for advanced multi-service queuing systems. Software simulation of such systems is possible, but the time required to obtain results of sufficient accuracy is unsatisfactory. Therefore, we attempted to implement the simulation in FPGA hardware chips. This requires the preparation of an appropriately faithful and unfortunately very complex model, which is time-consuming but results in obtaining satisfactory quality results in a short time, even for complex models.

This paper presents the idea of a hardware controller for a switching fabric of$log_{2}N$, where a complicated algorithm is implemented in the Xilinx FPGA Virtex5 chip. This implementation is time-efficient and allows for real control of network traffic for DCN/EON electrical and optical networks. Simulations and human-based analysis can also be performed using this design. It can serve as a calculating engine for SDN/OF networks. Three different boards with two types of Virtex5 FPGA chips from Xilinx were used as the hardware platform.

This paper presents a system for testing switching fabric controllers. The GUI allows to create UVM code for different structure of network, where fabric controllers are the nodes. The GUI tool creates topologies with one or more nodes, different scenarios are applied for device under test, scenarios for elastic optical network are generated automatic.

Simulations in typical software take a long time. To make them faster, it is possible to use hardware acceleration. Some people use graphical processors (GPU) which are faster than typical CPU (Central Processing Unit). Much more faster and more effective is to prepare Application Specific Integrated Circuit (ASIC). But it costs a lot of money and also takes time. Nowadays, optimal solution is to use FPGA chips (Field-Programmable Gate Array) which allow to prepare programmable hardware. It is flexible and fast. It requires specific treatment, tool chain for programming and testing, but finally, it gives powerful platform for calculation and data processing. In this paper I will show elements of architecture of system which was composed of 5 NetFPGA cards with 10G interfaces and Virtex 5 onboard (FPGA chip from Xilinx). Primary purpose of such a card is to serve Ethernet/IP network traffic, but, after preparing dedicated design, it is possible to use it as a hardware engine for calculations, ie. simulations.

Four variants of the optical data center network architecture (DCN1 - DCN4) based on optical circuit switching and elastic optical switching elements are proposed. For each variant theoretical limits for non-blocking operation have been derived and proved. The proposed networks are also compared in terms of the required number of switching elements. Our results show that variant DCN1 is more appropriate for very small data centers with tens of racks with servers, while variant DCN4 requires much fewer switching elements in data centers with hundreds or thousands of such racks.

In this paper, we address the problem of the strict-sense nonblocking operation of an elastic optical switch. Elastic optical switches are used as nodes in elastic optical networks (EONs), where fine granular frequency slots or flexible grids are used in opposite to the traditional optical networks, where fixed grids are used. The switch architecture considered in this paper consists of waveband converting switches in input and output stages, while in the center stage there is only one wavelength selective space switch without wavelength conversion capabilities. We derive the number of frequency channels k needed in interstage links to ensure the nonblocking operation of the switch when input and output links have n frequency channels and a frequency slot of one connection is not greater than m frequency channels. Both, necessity and sufficient conditions are proved.

In this paper, a system implemented in a web server for searching website crawlers which create a database of email addresses for spamming is presented. For every visitor the system generates fake and unique email addresses with hidden and stored data, serves them to the Internet, and waits for response. On the basis of the correlation between the email address used for spamming and information assigned to this address, the system points IP addresses which work for the "bad systems". This information can be used in further security systems as firewalls, intrusion detections systems (IDS) and intrusion prevention systems (IPS). A light version of the system which can be used by any administrator of the dynamic website is also presented.

In this paper we will present a system of virtual machines (virtual PCs) which has been designed and prepared for the realization of a large network of OSPF and BGP routers. Every routers is realized as an independent (virtual) machine, but thanks to LXC technology (Linux Container), they require very few resources for full and high performance. This system can be run on distributed hardware (more than one server) and it can cooperate with real hardware routers via Ethernet/IP connections. This system is remotely managed via dedicated software prepared in C#, it realizes user friendly GUI and other advanced functionalities.

Changes in traffic characteristics impose new requirements on interconnection network in large data centers. These requirements force changes to be done in the network architecture and used technology. Traditional tree network topology is being replaced by Clos network, called also Leaf-Spine topology, and optical interconnection networks are added in parallel to conventional electronic switching networks. Circuit switching is also used in such network instead of packet switching. In this paper we analyze the three-stage Clos network in which three multiplexing schemes are used simultaneously on input, output, and interstage links and with circuit switching mode. Strict-sense nonblocking conditions for this network with three multiplexing levels (space, wavelength, and mode) are derived and proved. Up till now such network with at most two multiplexing levels (space and time, or space and wavelength) has been considered.

In this paper we present the results of the delay measurements of the Ethernet traffic handled by different Open-Flow switches realized in the NetFPGA cards. We investigated three different software approaches: reference software for Open-Flow on NetFPGA cards, xDPd/ROFL prepared for OpenFlow implementation in NetFPGA cards and xDPD/ROFL library prepared for GNU/Linux cooperating with reference NIC with four ethernet ports realized on NetFPGA cards. All three cases have been realized on two versions of the NetFPGA cards - with 1G and 10G ports.

In this paper the system for measuring delay in computer networks is presented. This system has several blocks, the main of which is the NetFPGA card with appropriate software running in its hardware chip programmed in HDL - Verilog. The others blocks are implemented in typical software (C, C++, C#), they realize the functionality of the management and the graphical user interface. The presented system makes it possible to measure the delay in switched and routed Ethernet networks in many different configurations. One of the most valuable features of this system is its cost, the second one is the resolution of the measured time periods. This system was developed for the NetFPGA cards with four 1Gbps ports, it has been also successfully implemented in NetFPGA cards with 10G interfaces. Both version have been compared with high class industrial network analyzers.

This paper examines the effect of trust and IT innovations on organizational performance under asymmetric conditions in the context of collaborative agreements in the Supply Chain Management (SCM) process. Our research effort is timely and novel as it focuses on the current transition, on the part of SCM organizations, to a more electronically integrated environment. IT innovations, in this respect, hold a promise to enhance quality of inter-organizational information exchange and to make supply chains more transparent. The results of our study indicate that the interaction between trust and innovation varies in different markets. Having studied behaviors of companies in asymmetric environments of the SCM process in mature and emerging markets, we found that a higher level of maturity is more conducive for IT innovations despite the effect of asymmetries. Our findings also indicate that organizational performance suffers due to a slow pace of adoption of IT innovations designed to electronically integrate disparate organizational IT systems. Yet, we have observed that higher levels of trust do not necessarily lead to a significant increase in IT innovations in emerging markets. Also, trust has no effect on equilibrium of collaborative relationships in the context of asymmetric environments in emerging markets. Finally, we have found that power asymmetry exhibits negative influences on IT innovations for both economy types.

This paper presents the control algorithm for non-interruptive rearrangements in log2(N, 0, p) switching networks. The proposed algorithm is able to find a plane for any new connection in the rearrangeable switching network with no more than three rearrangements. Moreover, these rearrangements can be realized in the switching network without interrupting transmission for existing connections. Rearrangements are done by setting up a new connecting path before the old connecting path for the rearranged connection is disconnected. We also describe the FPGA implementation of this algorithm for the log2(32, 0, 4) switching network. This FPGA controller has been tested and verified.

In this paper we present rearrangeable log2(N, 0, p) switching fabrics and the control algorithm for the case of an even number of stages. The main topic of this paper is the implementation of a hardware controller for such fabrics. The algorithm is described in VHDL code and realized in ML505 - the demo board for Virtex 5 - FGPA chip from the Xilinx Company. The implementation presented here works very fast, the controller can send out the set of actual signals just 20 nanoseconds after the request has been made.

This paper presents a new way of representing the internal states of the log2((N; 0; p) switching fabrics. Basing on this representation a new algorithm for rearrangements in such fabric was developed and is presented here. Also, the maximal number of rearrangements in the log2((N; 0; p) switching fabrics with odd number of stages is presented.

This paper presents a hardware implementation of a control algorithm for the log2(N, 0, p) switching fabric. This algorithm controls both connections and disconnections in the strict sense of a nonblocking switching fabric. The hardware implementation of this algorithm in Virtex5 circuits is described. The presented implementation has been optimized in order to minimize the time response of the controller. The controller is suitable to work in applications which require very fast (even immediate) decisions. Simulations were performed and the hardware implementation shows that the controller is able to determine a plane for a new connection in one clock cycle. After this clock cycle the controller is also ready for the next connection.

A new control algorithm for log2(N, 0, p) switching networks composed of 2 x 2 switching elements has been proposed recently. Under this algorithm, log2(N,0,p) switching networks with even number of stages are wide-sense nonblocking (WSNB) if p is the same as for the rearrangeable nonblocking (RNB) one. The considerred algorithm and WSNB conditions did not take into account crosstalk constraint, which is an important factor in photonic switching. This paper enhanced this algorithm to the case when crosstalk in the switching fabric is not allowed. WSNB conditions for this enhanced algorithm are also derived. It is shown, that the number of planes required is less than those derived earlier in other papers for WSNB multiplane banyan- type switching fabrics under crosstalk constraint. Under this algorithm, log2( N,0,p) switching networks with odd number of stages and with zero crosstalk are WSNB if p is the same as for RNB one.

In this paper the new control algorithm for log2(N, 1, p) switching fabrics is proposed. This algorithm is the extension of the algorithm we propose for log2(N, 1, p) switching fabrics. The idea of the algorithm is to choose such a plane for the new connection in which this new connection will block the fewest number of possible future connections. Wide-sense nonblocking conditions are derived and proved when this algorithm is used for connection set up in such kind of switching fabrics with odd or even number of stages. The number of planes needed is the same as for the rearrangeable switching fabrics when the number of stages is even, and greater than for the rearrangeable switching fabric but lower than for the strict-sense nonblocking fabric, when the number of stages is odd.

A new control algorithm for log2(N, 0,p) switching networks composed of 2 × 2 switching elements has been proposed. Under this algorithm, log2(N, 0,p) switching networks with even number of stages are wide-sense nonblocking (WSNB) ifpis the same as for the rearrangeable nonblocking (RNB) one. In this paper we extend this solution to logd(N, 0,p) switching networks. The control algorithm is appropriately modified to switching networks composed ofd×dswitches. Wide-sense nonblocking operation of such switching networks with even number of stages is proved. We showed that number of planes needed for WSNB operation is also the same as in RNB switching networks.

A new control algorithm for multi-plane banyantype switching fabrics has been proposed recently. It has been shown that using this algorithm such switching fabrics can be wide-sense nonblocking (WSNB) when the number of planes is lower than for the strictly nonblocking (SNB) one, and for even number of stages the WSNB switching fabric requires the same number of planes as rearrangeable one. The considered algorithm and WSNB conditions did not take into account crosstalk constraint, which is an important factor in photonic switching. This paper enhanced this algorithm to the case when the first order crosstalk in the switching fabric is not allowed. WSNB conditions for this enhanced algorithm are also derived. It is shown that the number of planes required is less than those derived earlier in other papers for WSNB multiplane banyantype switching fabrics under crosstalk constraint.

A new control algorithm for the multiplane baseline switching network is proposed in this paper. This algorithm chooses a plane for a new connection in such a way that this new connection blocks the lowest number of possible future connections in the plane. We have proved, that when using this algorithm connections can be routed without blocking when the number of planes in the switching network is the same as in the rearrangeable one for even number of stages. When the switching network contains the odd number of stages, required number of planes is greater than in the rearrangeable switching network but less than in the strict-sense nonblocking one. Different implementations of the proposed algorithm are also considered. It should be noted, that the algorithm can determine the plane for a new connection in O(N0.5) time or even in O(1) time depending on the implementation. The overall time complexity of the proposed algorithm is from O(N3.5log2N) to O(N log2N) depending on its implementation and number of processors used

In this paper the new control algorithm for multi-log/sub 2/N switching networks is proposed. Wide-sense nonblocking conditions are derived and proved when this algorithm is used for connection set up in such kind of switching networks with even number of stages. It is shown, that under this algorithm and even the number of planes required for wide-sense non-blocking operation is the same as for the rearrangeable switching networks. To our knowledge this is the first switching network which achieves the same WSNB conditions as the rearrangeable one.