It was shown before that tests applied under nonfunctional operation conditions, which are made possible by scanning in an unreachable state, may lead to unnecessary yield loss. To address this issue, functional broadside tests were defined as broadside tests that use only reachable states of the circuit as scan-in states. Earlier procedures for generating functional broadside tests were not complete, i.e., they did not always detect all the detectable faults or prove that all the undetectable faults are undetectable. In this paper, we address the completeness of the functional broadside tests for transition faults. We describe the implementation of a test-generation procedure that can, for every transition fault, either find a functional broadside test or prove that the fault is undetectable under the functional broadside tests. We present experimental results where complete results are achieved for almost all the benchmark circuits considered.

We present a test generation procedure for transition faults that minimizes the detection of functionally redundant transition faults in scan circuits. The procedure uses broadside testing. We also propose rules for identifying dominance relations between functionally redundant transition faults and functionally detectable transition faults. Dominance relations can provide two types of lower bounds. (1) A lower bound on the number of functionally detectable transition faults that cannot be detected without detecting any functionally redundant transition faults. (2) A lower bound on the number of functionally redundant faults that have to be detected if all the functionally detectable faults are detected. In our experiments with ISCAS-89 and ITC-99 benchmark circuits we achieve both of the lower bounds for almost all the circuits considered.

In weighted random pattern testing based on deterministic test patterns, if the number of the deterministic test patterns with a low sampling probability is reduced, the number of the weighted random patterns required to achieve a high fault coverage can be decreased. The weight set that makes the variance of sampling probabilities for deterministic test patterns very small, can reduce the number of the deterministic test patterns with a low sampling probability. In this paper, we present a new weight set generation algorithm which can generate high performance weight sets by reducing the variance of the sampling probabilities. Experimental results on ISCAS-85 benchmark circuits prove the effectiveness of the new weight set generation algorithm.