This research explores into the utilization of synthetic data within image classification tasks and evaluates its efficiency in comparison to the utilization of real data. To facilitate this investigation, we employ the CIFAKE dataset, comprising the well-established CIFAR10 dataset and an equivalent number of images synthetically generated using the Latent Diffusion Model (LDM). The increasing demand for diverse and abundant labeled datasets has prompted the emergence of synthetic data as a potential solution to address data scarcity. Within this study, we scrutinize the performance of image classification models trained on both real and synthetic datasets. To ensure a comprehensive evaluation, we alternately apply test data across different models. Our analysis encompasses diverse factors, including classification accuracy, generalization capabilities, and robustness in various scenarios. The findings provide valuable insights into the efficacy of synthetic data as a viable alternative or complement to real data in the realm of image classification.

Noise removal in image processing and computer vision is a crucial preprocessing step employing a spectrum of techniques. In recent years, autoencoders exhibit remarkable efficacy in mapping noisy images to clean counterparts, capturing intricate relationships for effective noise removal. Motivated by the challenges posed by noise in real-world images, this research focuses on the denoising preprocessing step, crucial for tasks like object detection and segmentation. The study explores the application of autoencoders in removing artificially added noise from images within the MNIST dataset. The MNIST dataset’s simplicity and historical significance facilitate focused examinations on specific aspects, such as the impact of different types and levels of noise. The efficacy of autoencoders for noise removal is assessed through the evaluation of results using various metrics, including SSIM, PSNR, MSE, and RMSE. In one remarkable instance, the reconstruction process achieved an impressive peak SSIM score of 99.06%, showcasing the efficacy of the method in preserving image fidelity despite the challenging presence of noise. This comprehensive analysis provides valuable insights into the performance and effectiveness of autoencoders in the context of noise reduction in various domains.

Artificial intelligence, Machine Learning, and Deep Learning are increasingly making significant contributions to the field of medicine. Individual patient conditions, disease localization, and various influencing factors underscore the complexity of disease diagnosis and treatment planning. Introducing new technologies can revolutionize medical diagnostics, facilitating swift and accurate assessments. Among the noninvasive diagnostic methods, Magnetic Resonance Imaging (MRI) stands out, particularly in tumor diagnosis. UNet, renowned for its effectiveness in medical image analysis, serves as a robust model for semantic segmentation, as does DeepLabV3+. However, these models are inherently complex, and their inference process can be time-consuming. By leveraging the OpenVINO toolkit, the inference process is significantly reduced. In this study, nearly a 2-fold acceleration is achieved in inference time with the DeepLabV3+ model and a roughly 1.2-fold improvement with the UNet model on CPU. Moreover, when employing GPU with FP16 precision, the acceleration reached almost 2.5fold for UNet and nearly 3-fold for DeepLabV3+, showcasing the substantial performance enhancements attainable through optimized hardware utilization.

This paper presents a low-cost, single sensor autonomous mobile robot. The proposed system is able to map an indoor environment, while at the same time localizing itself within it, and solving the SLAM (Simultaneous Localization and Mapping) problem using data gathered from the sensor. It is able to navigate the environment, choosing safe paths for exploration based on the data acquired by mapping and localization. The system is based on commercially available, in-expensive hardware, while the software is developed with open-source ROS (Robot Operating System) packages. The ability for autonomous navigation of the proposed system has been verified through real-world experiments. The system offers a simple to build platform, which can easily be extended.

Object tracking is one of the fundamental tasks in computer vision. It is used almost everywhere: human-computer interaction, video surveillance, medical treatments, robotics, smart cars, etc. Many object tracking methods have been published in recent scientific publications. However, many questions still remain unanswered, such as, which object tracking method to choose for a particular application considering some specific characteristics of video content or which method will perform the best (quality-wise) and which one will have the best performance? In this paper, we provide some insights into how to choose an object tracking method from the widespread OpenCV library. We provide benchmarking results on the OTB-100 dataset by evaluating the eight trackers from the OpenCV library. We use two evaluation methods to evaluate the robustness of each algorithm: OPE and SRE combined with Precision and Success Plot.

Superpixel segmentation is a very popular image segmentation technique used in various computer vision tasks. Recently, a number of superpixel algorithms have been proposed in literature. One such algorithm is considered as the-state-of-the-art in superpixel segmentation: Simple Linear Iterative Clustering or SLIC. However, its original implementation has a long execution time on high performance processors designed within the common mobile and enterprise applications, as well on high-end processors such as Intel Xeon. Overall, the execution time for single-threaded implementation is considered critical for real-time or near real-time applications. In this paper, we explore the possibility of accelerating parts of the SLIC image segmentation critical for performance, by designing the image segmentation accelerator for Intel's Arria 10 SoC. We propose a novel architecture to enable hardware acceleration by addressing the problem of hardware/software partitioning to minimize the overall program latency.

We present a methodology for designing high-speed fully-adaptable Cyclic Redundancy Check (CRC) accelerators capable of supporting wide range of CRC standards. We extend our previous research with a module for generating contents of look-up tables, and we design new overlapped pipelined architecture. The resulting integration requires minimal resource and it ensures fast table re-generating process. Our accelerators achieve highest throughput when compared to related work, with possibility of additionally increasing throughput by extending the number of bits processed at a time. On the Xilinx Virtex 6 LX550T board they occupy between 1-2% area to produce maximum of 289.8Gbps with BRAM, or between 1.6 - 14% of area for 418.8Gbps without BRAM.

Cyclic Redundancy Check (CRC) is a well known error detection scheme used to detect corruption of digital content in digital networks and storage devices. In this paper, we present a study of different approaches of designing highly adaptable co-processors for CRC on an FPGA which are used in many network and server applications. The results of our research are two new architectures: adaptable and dynamically re-configurable CRC co-processors. Both architectures are highly flexible in terms of a number of CRC standards they support. We explored their scalability by processing different amount of input messages at a time. Results show that throughput doubles when we double the amount of data processed at a time. Our experimental results on adaptable CRC co-processor demonstrate re-generation latency as low as .9 - 4.52μs and throughput between 27.8 - 418Gbps (64 - 1024 bits of an input message). The re-configuration latency of dynamic parts of other CRC co-processor was significantly higher .3 - .45s, but area utilization was the least. The throughput of this architecture was between 29.25 - 347.37 Gbps.