Demonstration venue · read-only. Every page can be browsed; the buttons that would change it are switched off. Create an account to run TaxoReview on your own data.

Ronnie K. Poon

dblp:84/2352 · DBLP profile ↗
← Back
1ranked-venue papers
0as first author
0since 2021 · last 1982
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 1

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
1 paper
Processor architecture and microarchitecture · 50% Electronic design automation · 50%
Computer graphics and multimedia
1 paper
Image and video processing · 100%

Topics — the 2 heaviest of 3, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Processor architecture and microarchitecture
multiprocessor architecture
0.011982
A Microprocessor-Based Office Image Processing System · IEEE Trans. Computers 1982
Electronic design automation › high-level synthesis › scheduling
processor scheduling
0.011982
A Microprocessor-Based Office Image Processing System · IEEE Trans. Computers 1982

Methods — techniques the papers use, named apart from their topics

performance modeling · 0.0
YearPublicationVenuePosition
1982 A Microprocessor-Based Office Image Processing System
abstract
This paper presents a multiprocessor system architecture and the scheduling policies of the processors which can off-load a host computer in the image processing of office documents. The objective of this system is to provide extensive image processing capabilities at minimum cost and with an acceptable interactive response time. Multiprocessor system architecture, image partitioning strategies, image processing algorithm characteristics, performance modeling, and processor scheduling policies are investigated. A prototype multiprocessor image processing system has been built at the IBM San Jose Research Laboratory.
Lionel M. Ni, Kwan Y. Wong, Daniel T. Lee, Ronnie K. Poon
IEEE Trans. Computers4