Demo Data from VLDB 2026 / reviewers in the wild / expert
Michel Masella
dblp:84/3777
· DBLP profile ↗
1ranked-venue papers
0as first author
0since 2021 · last 2018
0000-0003-1073-4457ORCID · reported
Domains — the database's venue-derived domains; a paper can count in several
Applied, interdisciplinary, general and emerging computing · 1
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Computer architecture, parallel and distributed computing, and storage systems
1 paper |
High-performance computing · 56% Electronic design automation · 28% Performance modeling and evaluation · 17% |
Topics — the 5 heaviest of 5, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
High-performance computing › performance optimization
auto-tuning |
0.3 | 1 | 2018 | The Long and Winding Road Toward Efficient High-Performance Computing · Proc. IEEE 2018 |
Electronic design automation
hardware/software co-design |
0.3 | 1 | 2018 | The Long and Winding Road Toward Efficient High-Performance Computing · Proc. IEEE 2018 |
High-performance computing
performance optimization |
0.3 | 1 | 2018 | The Long and Winding Road Toward Efficient High-Performance Computing · Proc. IEEE 2018 |
Performance modeling and evaluation
benchmarking |
0.1 | 1 | 2018 | The Long and Winding Road Toward Efficient High-Performance Computing · Proc. IEEE 2018 |
Performance modeling and evaluation
performance analysis tools |
0.1 | 1 | 2018 | The Long and Winding Road Toward Efficient High-Performance Computing · Proc. IEEE 2018 |
Methods — techniques the papers use, named apart from their topics
performance analysis · 0.3auto-tuning · 0.3
| Year | Publication | Venue | Position |
|---|---|---|---|
| 2018 | The Long and Winding Road Toward Efficient High-Performance ComputingabstractThe major challenge to Exaflop computing, and more generally, efficient high-end computing, is in finding the best “matches” between advanced hardware capabilities and the software used to program applications, so that top performance will be achieved. Several benchmarks show very disappointing performance progress over the last decade, clearly indicating a mismatch between hardware and software. To remedy this problem, it is important that key performance enablers at the software level-autotuning, performance analysis tools, full application optimization-are understood. For each area, we highlight major limitations and most promising approaches to reaching better performance and energy levels. Finally, we conclude by analyzing hardware and software design, trying to pave the way for more tightly integrated hardware and software codesign. William Jalby, David J. Kuck, Allen D. Malony, Michel Masella, Abdelhafid Mazouz, Mihail Popov |
Proc. IEEE | 4 |