VLDB 2026 Research / reviewers in the wild / expert
James E. McCormick
dblp:84/4855
· DBLP profile ↗
1ranked-venue papers
0as first author
0since 2021 · last 1995
—ORCID · none
Domains — the database's venue-derived domains; a paper can count in several
Systems, architecture and hardware · 1Software engineering, systems software and programming languages · 1
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Computer architecture, parallel and distributed computing, and storage systems
1 paper |
Processor architecture and microarchitecture · 100% | |
| Software engineering, system software, and programming languages
1 paper |
Compilers and program optimization · 100% |
Topics — the 5 heaviest of 5, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
Compilers and program optimization
code generation |
0.0 | 1 | 1995 | A Comparison of Full and Partial Predicated Execution Support for ILP Processors · ISCA 1995 |
Compilers and program optimization
predicated execution |
0.0 | 1 | 1995 | A Comparison of Full and Partial Predicated Execution Support for ILP Processors · ISCA 1995 |
Processor architecture and microarchitecture
instruction-level parallelism |
0.0 | 1 | 1995 | A Comparison of Full and Partial Predicated Execution Support for ILP Processors · ISCA 1995 |
Processor architecture and microarchitecture › instruction-level parallelism
predicated execution |
0.0 | 1 | 1995 | A Comparison of Full and Partial Predicated Execution Support for ILP Processors · ISCA 1995 |
Processor architecture and microarchitecture › instruction set architecture
instruction set design |
0.0 | 1 | 1995 | A Comparison of Full and Partial Predicated Execution Support for ILP Processors · ISCA 1995 |
Methods — techniques the papers use, named apart from their topics
compiler optimization · 0.0
| Year | Publication | Venue | Position |
|---|---|---|---|
| 1995 | A Comparison of Full and Partial Predicated Execution Support for ILP ProcessorsabstractOne can effectively utilize predicated execution to improve branch handling in instruction-level parallel processors. Although the potential benefits of predicated execution are high, the tradeoffs involved in the design of an instruction set to support predicated execution can be difficult. On one end of the design spectrum, architectural support for full predicated execution requires increasing the number of source operands for all instructions. Full predicate support provides for the most flexibility and the largest potential performance improvements. On the other end, partial predicated execution support, such as conditional moves, requires very little change to existing architectures. This paper presents a preliminary study to qualitatively and quantitatively address the benefit of full and partial predicated execution support. With our current compiler technology, we show that the compiler can use both partial and full predication to achieve speedup in large control-intensive programs. Some details of the code generation techniques are shown to provide insight into the benefit of going from partial to full predication. Preliminary experimental results are very encouraging: partial predication provides an average of 33% performance improvement for an 8-issue processor with no predicate support while full predication provides an additional 30% improvement. Scott A. Mahlke, Richard E. Hank, James E. McCormick, David I. August, Wen-Mei W. Hwu |
ISCA | 3 |