Nonvolatile spintronic devices have potential advantages, such as fast read/write and high endurance together with back-end-of-the-line compatibility, which offers the possibility of constructing not only stand-alone RAMs and embedded RAMs that can be used in conventional VLSI circuits and systems but also standby-power-free high-performance nonvolatile CMOS logic employing logic-in-memory architecture. The advantages of employing spintronic devices, especially magnetic tunnel junction (MTJ) devices with CMOS circuits, are discussed, and the current status of the MTJ-based VLSI computing paradigm is presented along with its prospects and remaining challenges.

Recent advances in spintronics devices make it possible to open a new era of microelectronics. In this paper, we review the spintronics devices utilizing spin-transfer torques (STTs) and spin-orbit torques (SOTs) developed in recent years. The progresses of two-terminal STT device with CoFeB-MgO based magnetic tunnel junction (MTJ), three-terminal magnetic domain wall (DW) motion device with Co/Ni multilayer, and three-terminal SOT device with Cu-based channel are described. Integrated circuits with the developed spintronics devices are also reviewed.

A perpendicular magnetic-tunnel-junction (MTJ)-based 2T-2R ternary content-addressable memory (TCAM) cell is proposed for a high-density nonvolatile word-parallel/bit-serial TCAM. The use of MOS/MTJ-hybrid logic makes it possible to implement a compact nonvolatile TCAM cell with 2.5 μm2of a cell size in a 0.14-μm CMOS and a 100-nm perpendicular-MTJ technologies. By reversed-current reading through the perpendicular MTJ device, tolerability of read disturb is greatly enhanced. Moreover, fine-grained power gating based on bit-level equality-search scheme achieves ultra-low activity rate of 4.1% in a fabricated 72-bit × 128-word nonvolatile TCAM, which results in ultra-low active power and standby power.

Nonvolatile logic-in-memory architecture, where nonvolatile memory elements are distributed over a logic-circuit plane, is expected to realize both ultra-low-power and reduced interconnection delay. This paper presents novel nonvolatile logic circuits based on logic-in-memory architecture using magnetic tunnel junctions (MTJs) in combination with MOS transistors. Since the MTJ with a spin-injection write capability is only one device that has all the following superior features as large resistance ratio, virtually unlimited endurance, fast read/write accessibility, scalability, complementary MOS (CMOS)-process compatibility, and nonvolatility, it is very suited to implement the MOS/MTJ-hybrid logic circuit with logic-in-memory architecture. A concrete nonvolatile logic-in-memory circuit is designed and fabricated using a 0.18 mum CMOS/MTJ process, and its future prospects and issues are discussed.