Boundary surface approximation of 3-D neuroanatomical regions from sparse 2-D images (e.g., mouse brain olfactory bulb structures from a 2-D brain atlas) has proven to be difficult due to the presence of abutting, shared boundary surfaces that are not handled by traditional boundary-representation data structures and surfaces-from-contours algorithms. We describe a data structure and an algorithm to reconstruct separating surfaces among multiple regions from sparse cross-sectional contours. We define a topology graph for each region, that describes the topological skeleton of the region's boundary surface and that shows between which contours the surface patches should be generated. We provide a graph-directed triangulation algorithm to reconstruct surface patches between contours. We combine our graph-directed triangulation algorithm together with a piecewise parametric curve fitting technique to ensure that abutting or shared surface patches are precisely coincident. We show that our method overcomes limitations in 1) traditional contours-from-surfaces algorithms that assume binary, not multiple, regionalization of space, and in 2) few existing separating surfaces algorithms that assume conversion of input into a regular volumetric grid, which is not possible with sparse interplanar resolution.

We describe a method for processing large amounts of volumetric data collected from a Knife Edge Scanning Microscope (KESM). The neuronal data that we acquire consists of thin, branching structures extending over very large regions that prior volumetric representations have difficulty dealing with efficiently. Since the full volume data set can be extremely large, on-the-fly processing of the data is necessary.

The 3-D deformable brain atlas (DBA), an integrated image database/knowledge base system is proposed. Major aims of the DBA are to integrate spatial and symbolic representations of anatomical knowledge, and to create an open system of information which the user can both search and append additional information. An object-oriented and landmark-based registration and integration scheme that fulfils these goals is described. Landmarks are chosen for image registration and atlas integration. The registration approach, which treats images as elastic materials, uses Gaussian radial basis functions. Registration is both simple and efficient and can be applied to both 2-D and 3-D imagery. Sets of landmarks, called frame points, allow new images to be integrated into the DBA through an existing parent image (2-D or 3-D). A web structure is used to track and update the information needed in the registration and integration process. The major features of the DBA system are illustrated.>

No abstract available.

A modular design strategy for the implementation of control logic is discussed. After discussing several basic control modules, the overall design of control sequencing is described and a particular control sequence taken from the Illiac III computer is worked as an example of the technique. Finally, the diagnostic features incorporated as part of the technique are discussed and a comparison made with microprogramming.

This report describes the system design of an all-digital computer for visual recognition. One processor, the Pattern Articulation Unit (PAU), has been singled out for detailed discussion. Other units, in particular the Arithmetic Unit and the Taxicrinic Unit, are treated in reports listed in the bibliography. The PAU has been shown to be a processor of fundamentally new design-its logical organization has no analog in the central processing unit of existing computers. The PAU is the first modular parallel processor which because of its digital organization is capable of more reliable visual identification than part analog/part digital preprocessors of much less generality and potential virtuosity; is faster than any presently suggested alternative realizable today at comparable cost; and can serve as a prototype to a new generation of parallel computers that will capitalize upon thin film and integrated semiconductor circuitry of the immediate future.