Demo Data from VLDB 2026 / reviewers in the wild / expert
Constanze Hofstoetter
dblp:85/5794
· DBLP profile ↗
1ranked-venue papers
1as first author
0since 2021 · last 2004
—ORCID · none
Domains — the database's venue-derived domains; a paper can count in several
Artificial intelligence and machine learning · 1 · 1 first-author
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Computer architecture, parallel and distributed computing, and storage systems
1 paper |
Emerging computing paradigms · 67% Integrated circuit design · 33% | |
| Artificial intelligence
1 paper |
Robot navigation and mapping · 100% |
Topics — the 3 heaviest of 4, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
Integrated circuit design › analog and mixed-signal circuits
analog VLSI |
0.0 | 1 | 2004 | The Cerebellum Chip: an Analog VLSI Implementation of a Cerebellar Model of Classical Conditioning · NIPS 2004 |
Emerging computing paradigms
neuromorphic computing |
0.0 | 1 | 2004 | The Cerebellum Chip: an Analog VLSI Implementation of a Cerebellar Model of Classical Conditioning · NIPS 2004 |
Emerging computing paradigms
neuromorphic hardware |
0.0 | 1 | 2004 | The Cerebellum Chip: an Analog VLSI Implementation of a Cerebellar Model of Classical Conditioning · NIPS 2004 |
Methods — techniques the papers use, named apart from their topics
classical conditioning model · 0.1analog VLSI · 0.1
| Year | Publication | Venue | Position |
|---|---|---|---|
| 2004 | The Cerebellum Chip: an Analog VLSI Implementation of a Cerebellar Model of Classical ConditioningabstractWe present a biophysically constrained cerebellar model of classical conditioning, implemented using a neuromorphic analog VLSI (aVLSI) chip. Like its biological counterpart, our cerebellar model is able to control adaptive behavior by predicting the precise timing of events. Here we describe the functionality of the chip and present its learning performance, as evaluated in simulated conditioning experiments at the circuit level and in behavioral experiments using a mobile robot. We show that this aVLSI model supports the acquisition and extinction of adaptively timed conditioned responses under real-world conditions with ultra-low power consumption. Constanze Hofstoetter, Manuel Gil, Kynan Eng, Giacomo Indiveri, Matti Mintz, Jörg Kramer, Paul F. M. J. Verschure |
NIPS | 1 |