This paper presents an orchestrated combination of software synthesis and automatic hardware/software interface generation to meet hard real-time constraints. The target applications are digital communication systems, which are specified as concurrent communicating processes. The overall approach is theoretically founded and is demonstrated on an industrial strength design, with promising results.

This paper presents a new formal method for the efficient verification of concurrent systems that are modeled using a safe Petri net representation. Our method generalizes upon partial-order methods to explore concurrently enabled conflicting paths simultaneously. We show that our method can achieve an exponential reduction in algorithmic complexity without resorting to an implicit enumeration approach.

We reflect on the nature of digital telecommunication systems. We argue that these systems require, by nature, a heterogeneous specification and an implementation with heterogeneous architectural styles. CoWare is a hardware/software co-design environment based on a data model that allows to specify, simulate, and synthesize heterogeneous hardware/software architectures from a heterogeneous specification. CoWare is based on the principle of encapsulation of existing hardware and software compilers and special attention is paid to the interactive synthesis of hardware/software and hardware/hardware interfaces. The principles of CoWare are illustrated by the design process of a spread-spectrum receiver for a pager system.

Deep sub-micron processing technologies have enabled the implementation of new application-specificembeddedarchitecturesthat integrate multiple software programmable processors (e.g. DSPs, microcontrollers) and dedicated hardware components together onto a single cost-efficient IC. These application-specific architectures are emerging as a key design solution to today's microelectronics design problems, which are being driven by emerging applications in the areas of wireless communication, broadband networking, and multimedia computing. However, the constructionof these customized heterogeneous multiprocessor architectures, while ensuring that the hardware and software parts communicate correctly, is a tremendously difficult and highly error proned task with little or no tool support. In this paper, we present a solution to this embedded architecture cosynthesis problem based on an orchestrated combination of architectural strategies, parameterized libraries, and software tool support....

Heterogeneous embedded multiprocessor architectures are becoming more prominent as a key design solution to today's microelectronics design problems.These application-specific architectures integrate multiple software programmable processors and dedicated hardwarecomponents together on to a single cost-efficient IC.In contrast to general-purpose computer systems, embedded systems are designed and optimized to provide specific functionality, using possibly a combination of different classes of processors (e.g.DSPs, microcontrollers) from different vendors.While these customized heterogeneous multiprocessor architectures offer designers new possibilities to tradeoff programmability, processing performance, power dissipation, and design turnaround time, there is currently a lack of tools to support the programming of these architectures.In this paper, we consider the problem of providing real-time kernel support for managing the concurrent software tasks that are distributed over a set of processorsin an application-specific multiprocessorarchitecture.This is complementary to current research activities that aim to provide efficient retargetable code generation [8,11,10] for a broad range of embedded processors.