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Jean-Francois Dietiker

dblp:86/6105 · DBLP profile ↗
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1ranked-venue papers
0as first author
0since 2021 · last 2020
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 1

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
1 paper
High-performance computing · 70% Processor architecture and microarchitecture · 23% Memory systems · 7%

Topics — the 5 heaviest of 5, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
High-performance computing › numerical linear algebra › linear solver
iterative linear solvers
0.412020
Fast stencil-code computation on a wafer-scale processor · SC 2020
High-performance computing
scientific computing systems
0.412020
Fast stencil-code computation on a wafer-scale processor · SC 2020
High-performance computing
stencil computation
0.412020
Fast stencil-code computation on a wafer-scale processor · SC 2020
Processor architecture and microarchitecture › multicore design
waferscale processor
0.412020
Fast stencil-code computation on a wafer-scale processor · SC 2020
Memory systems
memory bandwidth
0.112020
Fast stencil-code computation on a wafer-scale processor · SC 2020

Methods — techniques the papers use, named apart from their topics

finite difference · 0.4BiCGStab · 0.4
YearPublicationVenuePosition
2020 Fast stencil-code computation on a wafer-scale processor
abstract
The performance of CPU-based and GPU-based systems is often low for PDE codes, where large, sparse, and often structured systems of linear equations must be solved. Iterative solvers are limited by data movement, both between caches and memory and between nodes. Here we describe the solution of such systems of equations on the Cerebras Systems CS-1, a wafer-scale processor that has the memory bandwidth and communication latency to perform well. We achieve 0.86 PFLOPS on a single wafer-scale system for the solution by BiCGStab of a linear system arising from a 7-point finite difference stencil on a 600 × 595 × 1536 mesh, achieving about one third of the machine's peak performance. We explain the system, its architecture and programming, and its performance on this problem and related problems. We discuss issues of memory capacity and floating point precision. We outline plans to extend this work towards full applications.
Kamil Rocki, Dirk Van Essendelft, Ilya Sharapov, Robert Schreiber, Michael Morrison, Vladimir Kibardin, Andrey Portnoy, Jean-Francois Dietiker, Madhava Syamlal, Michael James 0002
SC8