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A. Boneh

dblp:87/188 · DBLP profile ↗
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1ranked-venue papers
1as first author
0since 2021 · last 1992
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 1 · 1 first-author

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
1 paper
Electronic design automation · 100%

Topics — the 3 heaviest of 3, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Electronic design automation › hardware verification and test
fault simulation
0.011992
Statistical Resistance to Detection · IEEE Trans. Computers 1992
Electronic design automation › hardware verification and test
hardware verification
0.011992
Statistical Resistance to Detection · IEEE Trans. Computers 1992
Electronic design automation › hardware verification and test
random testing
0.011992
Statistical Resistance to Detection · IEEE Trans. Computers 1992

Methods — techniques the papers use, named apart from their topics

statistical estimation · 0.0
YearPublicationVenuePosition
1992 Statistical Resistance to Detection
abstract
Discusses the problem of estimating the sum of the detection probabilities of the yet unobserved faults during a random pattern test of a given digital circuit. The authors describe a statistical method for this purpose. The method requires keeping track of each fault until it is detected for the second time, and thus the simulation cost is about twice the cost of a similar simulation which abandons faults after their first detect. The benefits of having an estimate of the sum of these detection probabilities are twofold: (1) it provides a good stopping rule whenever 100% fault coverage is infeasible (which is often the case), and (2) it provides an estimate of the required effort to detect the next fault. The results of tests performed on some circuits are presented.>
A. Boneh, Jacob Savir
IEEE Trans. Computers1