VLDB 2026 Research / reviewers in the wild / expert

Paul D. Stigall

dblp:87/4872 · DBLP profile ↗
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2ranked-venue papers
0as first author
0since 2021 · last 1974
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 2Software engineering, systems software and programming languages · 2

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Software engineering, system software, and programming languages
2 papers
Compilers and program optimization · 100%
Computer architecture, parallel and distributed computing, and storage systems
2 papers
Processor architecture and microarchitecture · 62% Electronic design automation · 38%

Topics — the 6 heaviest of 8, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Compilers and program optimization
code size reduction		 0.011974
Instruction Design To Minimize Program Size · ISCA 1974
Compilers and program optimization › code generation
microcode generation		 0.011974
HMO, A Hardware Microcode Optimizer · ISCA 1974
Compilers and program optimization
microcode optimization		 0.011974
HMO, A Hardware Microcode Optimizer · ISCA 1974
Processor architecture and microarchitecture
instruction set architecture		 0.011974
Instruction Design To Minimize Program Size · ISCA 1974
Processor architecture and microarchitecture › instruction set architecture › ISA specification
instruction encoding		 0.011974
Instruction Design To Minimize Program Size · ISCA 1974
Processor architecture and microarchitecture › microprogramming
microprogrammable processor		 0.011974
HMO, A Hardware Microcode Optimizer · ISCA 1974

Methods — techniques the papers use, named apart from their topics

hardware implementation · 0.0algorithm design · 0.0
YearPublicationVenuePosition
1974 HMO, A Hardware Microcode Optimizer
abstract
This paper discusses an algorithm for optimizing the density and parallelism of microcoded routines in microprogrammable machines. Besides the algorithm itself, the algorithm's uses, adaptability to conventional machine characteristics, and architectural requirements are also discussed and analyzed. Even though the paper proposes a hardware implementation of the algorithm, the algorithm is viewed as an integral part of the entire microcode generation and usage process, from initial high-level input into a software microcode compiler down to machine-level execution of the resultant microcode on the host machine. It is believed that, by removing much of the traditionally time-consuming and machine-dependent microcode optimization from the software portion of this process, the algorithm can improve the overall process.
James O. Bondi, Paul D. Stigall
 ISCA2
1974 Instruction Design To Minimize Program Size
abstract
Article Instruction design to minimize program size Share on Authors: James F. Wade University of Missouri-Rolla, Rolla, Missouri University of Missouri-Rolla, Rolla, MissouriView Profile , Paul D. Stigall University of Missouri-Rolla, Rolla, Missouri University of Missouri-Rolla, Rolla, MissouriView Profile Authors Info & Claims ISCA '75: Proceedings of the 2nd annual symposium on Computer architectureJanuary 1975 Pages 41–44https://doi.org/10.1145/642089.642097Online:01 December 1974Publication History 8citation230DownloadsMetricsTotal Citations8Total Downloads230Last 12 Months1Last 6 weeks0 Get Citation AlertsNew Citation Alert added!This alert has been successfully added and will be sent to:You will be notified whenever a record that you have chosen has been cited.To manage your alert preferences, click on the button below.Manage my AlertsNew Citation Alert!Please log in to your account Save to BinderSave to BinderCreate a New BinderNameCancelCreateExport CitationPublisher SiteGet Access
James F. Wade, Paul D. Stigall
 ISCA2