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Yasushi Kanoh

dblp:87/5774 · DBLP profile ↗
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1ranked-venue papers
0as first author
0since 2021 · last 2000
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 1

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
1 paper
Memory systems · 70% Interconnection networks and networks-on-chip · 23% Parallel and multicore computing · 7%

Topics — the 4 heaviest of 5, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Memory systems › non-uniform memory access
CC-NUMA
0.012000
A DSM Architecture for a Parallel Computer Cenju-4 · HPCA 2000
Memory systems › cache coherence
directory-based coherence
0.012000
A DSM Architecture for a Parallel Computer Cenju-4 · HPCA 2000
Memory systems › shared memory
distributed shared memory
0.012000
A DSM Architecture for a Parallel Computer Cenju-4 · HPCA 2000
Parallel and multicore computing › multiprocessor system
scalable multiprocessor
0.012000
A DSM Architecture for a Parallel Computer Cenju-4 · HPCA 2000
YearPublicationVenuePosition
2000 A DSM Architecture for a Parallel Computer Cenju-4
abstract
A parallel computer Cenju-4 is a cache-coherent non-uniform memory access (ccNUMA) multiprocessor and designed to be scalable up to 1024 nodes. For scalability, Cenju-4 adopts a bit-pattern directory. This scheme enables more precise representation than other imprecise schemes, such as a coarse vector scheme. Cenju-4 utilizes multicast and gathering functions of the network for delivering invalidation request messages and for collecting replies. This enables store access latency to be scalable, even when the block is shared among all nodes. Cenju-4 also prevents starvation and deadlock by queuing certain types of messages in the main memory. This enables a full solution to the starvation problem with centralized directory scheme, and to the deadlock problem with one physical or virtual network. The buffer sizes required for queuing messages at each node are only 32K bytes and two 64K bytes on a 2024-node system. In this paper, we present the design of the DSM architecture and some performance results.
Takeo Hosomi, Yasushi Kanoh, Masaaki Nakamura, Tetsuya Hirose
HPCA2