For polar codes, perturbing received information can enhance the successive cancellation (SC) decoding performance. This is an effective approach for realizing low-latency yet high performance for long polar codes, since all the perturbation-enhanced SC (PSC) decoding can be performed in parallel. This paper provides theoretical insights into soft information perturbation, revealing that the PSC decoding can be equivalently interpreted as perturbing thea posteriorilog-likelihood ratios (LLRs) of information bits. Such a revelation leads to the design of an improved PSC (IPSC) decoding that yields a lower perturbation complexity. By better utilizing the decodinga posterioriLLRs, a set of possibly erroneous estimations can be formed and further perturbed, resulting in the proposed hybrid PSC (HPSC) decoding. During each new SC decoding attempt, it takes turns to flip the first erroneous bit by introducing a biased perturbation, while the subsequent erroneous estimations are corrected through random perturbations. Our simulation results validate that, for various codeword lengths and rates, the proposed IPSC decoding can achieve a similar performance as the conventional PSC decoding, but yield a significantly reduced perturbation complexity. With the same number of decoding attempts, the proposed HPSC decoding outperforms several state-of-the-art SC-based decoding, such as the thresholded SC-flip (TSCF) decoding and the dynamic SC-flip (DSCF) decoding.

For polar codes, the bit-flipping strategy can significantly improve performance of its successive cancellation (SC) decoding. However, the gain derived from SC-flip (SCF) decoding diminishes as the codeword length increases. Addressing this issue, this paper proposes a novel hybrid perturbation-based SC (HPSC) decoding. If the initial SC decoding fails, the algorithm will generate multiple SC decoding attempts, each of which introduces stochastic perturbations to the received symbols. By soft information perturbations, the SC decoding can divert from the initial erroneous estimation and converge to the intended one. Our simulation results show that the proposed HPSC decoding consistently yields stable coding gains over various codeword lengths and rates. With the same number of decoding attempts, the HPSC decoding outperforms the thresholded SCF (TSCF) decoding. Moreover, it can achieve a similar performance as the cyclic redundancy check (CRC) aided SC list (CA-SCL) decoding, without any path sorting and expansion requirements.

For polar codes, perturbing received information can enhance the error-correction performance of successive cancellation (SC) decoding. This is an effective approach for realizing low-latency yet high decoding performance for long polar codes, since each perturbation-enhanced SC (PSC) decoding can be performed in parallel. This paper provides theoretical insights into the soft information perturbation. It first reveals that the PSC decoding can be equivalently viewed as perturbing the SC decoding a posteriori log-likelihood ratio (LLR) of the information bits. Such a revelation enables us to reduce the perturbation complexity by only targeting the information bits, resulting in an improved PSC (IPSC) decoding. By better utilizing the a posteriori LLRs, a set of possibly erroneous estimations can be formed to be perturbed, further reducing the perturbation complexity. Our simulation results show that, for various codeword lengths, the proposed IPSC decoding can achieve a similar performance as the PSC decoding, while yielding significant perturbation complexity reduction.

Targeting high-throughput and low-power communications, we implement two successive cancellation (SC) decoders for polar codes. Converted to 16nm ASIC technology, the area efficiency and energy efficiency are 4Tbps/mm2and 0.63pJ/bit, respectively, for the unrolled decoder, and 561Gbps/mm2and 1.21pJ/bit, respectively, for the recursive decoder. To achieve such a high throughput, a novel code construction, coined as fast polar codes, is proposed and jointly optimized with a highly-parallel SC decoding architecture. First, we reuse existing modules to fast decode more outer code blocks, and then modify code construction to facilitate faster decoding for all outer code blocks up to a degree of parallelism of 16. Furthermore, parallel comparison circuits and bit quantization schemes are customized for hardware implementation. Collectively, they contribute to an 2.66× area efficiency improvement and 33% energy saving over the state of the art.

Identification capacities of randomized and deterministic identification were proved to exceed channel capacity for Gaussian channels with channel side information (CSI). In this work, we extend deterministic identification to the block fading channels without CSI by applying identification codes for both channel estimation and user identification. We prove that identification capacity is asymptotically higher than transmission capacity even in the absence of CSI. And we also analyze the finite-length performance theoretically and numerically. The simulation results verify the feasibility of the proposed blind deterministic identification in finite blocklength regime.

Recently, a parallel decoding algorithm of GN-coset codes was proposed. The algorithm exploits two equivalent decoding graphs. For each graph, the inner code part, which consists of independent component codes, is decoded in parallel. The extrinsic information of the code bits is obtained and iteratively exchanged between the graphs until convergence. This algorithm enjoys a higher decoding parallelism than the previous successive cancellation algorithms, due to the avoidance of serial outer code processing. In this work, we present a hardware implementation of the parallel decoding algorithm, it can support maximum N = 16384. We complete the decoder's physical layout in TSMC 16nm process and the size is 999.936μm×999.936μm, ≈ 1.00mm2. The decoder's area efficiency and power consumption are evaluated for the cases of N = 16384, K = 13225 and N = 16384, K = 14161. Scaled to 7nm process, the decoder's throughput is higher than 477Gbps/mm2and 533Gbps/mm2with five iterations.

Recently, a parallel decoding framework of GN-coset codes was proposed. High throughput is achieved by decoding the independent component polar codes in parallel. Various algorithms can be employed to decode these component codes, enabling a flexible throughput-performance tradeoff. In this work, we adopt successive cancellation (SC) as the component decoders to achieve the highest-throughput end of the tradeoff. The benefits over soft-output component decoders are reduced complexity and simpler (binary) interconnections among component decoders. To reduce performance degradation, we integrate an error detector and a log-likelihood ratio (LLR) generator into each component decoder. The LLR generator, specifically the damping factors therein, is designed by a genetic algorithm. This low-complexity design can achieve an area efficiency of 533Gbps/mm2under 7nm technology.

Polar codes has been selected as the channel coding scheme for 5G new radio (NR) control channel. Specifically, a special type of parity-check polar (PC-Polar) codes was adopted in uplink control information (UCI). In this paper, we propose a parity-check soft-cancellation (PC-SCAN) algorithm and its simplified version to decode PC-Polar codes. The potential benefits are two-fold. First, PC-SCAN can provide soft output for PCPolar codes, which is essential for advanced turbo receivers. Second, the decoding performance is better than that of successive cancellation (SC). This is due to the fact that paritycheck constraints can be exploited by PC-SCAN to enhance the reliability of other information bits over the iterations. Moreover, we describe a cyclic-shift-register (CSR) based implementation "CSR-SCAN" to reduce both hardware cost and latency with minimum performance loss.

In this work, we propose a type of GN-coset codes for parallel decoding. The parallel decoder exploits two equivalent decoding graphs of GN-coset codes. For each decoding graph, the inner code part is composed of independent component codes to be decoded in parallel. The extrinsic information of the code bits is obtained and iteratively exchanged between the two graphs until convergence. Accordingly, we explore a heuristic and flexible code construction method (information set selection) for various information lengths and coding rates. Compared to the previous successive cancellation algorithm, the parallel decoder avoids the serial outer code processing and enjoys a higher degree of parallelism. Furthermore, a flexible trade-off between performance and decoding latency can be achieved with three types of component decoders. Simulation results demonstrate that the proposed encoder-decoder framework achieves comparable error correction performance to polar codes with a much lower decoding latency.

Accurate prediction of fading channel in the upcoming transmission frame is essential to realize adaptive transmission for transmitters, and receivers with the ability of channel prediction can also save some computations of channel estimation. However, due to the rapid channel variation and channel estimation error, reliable prediction is hard to realize. In this situation, an appropriate channel model should be selected, which can cover both the statistical model and small scale fading of channel, this reminds us the natural languages, which also have statistical word frequency and specific sentences. Accordingly, in this paper, we take wireless channel model as a language model, and the time-varying channel as talking in this language, while the realistic noisy estimated channel can be compared with mumbling. Furthermore, in order to utilize as much as possible the information a channel coefficient takes, we discard the conventional two features of absolute value and phase, replacing with hundreds of features which will be learned by our channel model, to do this, we use a vocabulary to map a complex channel coefficient into an ID, which is represented by a vector of real numbers. Recurrent neural networks technique is used as its good balance between memorization and generalization, moreover, we creatively introduce sequence-to-sequence (seq2seq) models in time series channel prediction, which can translate past channel into future channel. The results show that realistic channel prediction with superior performance relative to channel estimation is attainable.

The key to successive cancellation (SC) flip decoding of polar codes is to accurately identify the first error bit. The optimal flipping strategy is considered difficult due to lack of an analytical solution. Alternatively, we propose a deep learning aided SC flip algorithm. Specifically, before each SC decoding attempt, a long short-term memory (LSTM) network is exploited to either (i) locate the first error bit, or (ii) undo a previous "wrong" flip. In each SC attempt, the sequence of log likelihood ratios (LLRs) derived in the previous SC attempt is exploited to decide which action to take. Accordingly, a two-stage training method of the LSTM network is proposed, i.e., learn to locate first error bits in the first stage, and then to undo "wrong" flips in the second stage. Simulation results show that the proposed approach identifies error bits more accurately and achieves better block error rate performance than the state-of-the-art SC flip algorithms.