Demonstration venue · read-only. Every page can be browsed; the buttons that would change it are switched off. Create an account to run TaxoReview on your own data. A simulation from public publication records: the people listed were not invited and did not agree to review.
? Tutorial for this page

Nathan Tuck

dblp:88/358 · DBLP profile ↗
← Back
4ranked-venue papers
3as first author
0since 2021 · last 2014
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 3 · 2 first-authorComputer networks · 1 · 1 first-author

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Network and information security
2 papers
Systems and software security · 77% Network security · 23%
Computer architecture, parallel and distributed computing, and storage systems
2 papers
Processor architecture and microarchitecture · 93% Hardware accelerators and domain-specific architectures · 7%
Theoretical computer science
1 paper
Algorithms and data structures · 100%

Topics — the 10 heaviest of 12, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Processor architecture and microarchitecture
multithreading
0.112005
Multithreaded Value Prediction · HPCA 2005
Processor architecture and microarchitecture › multithreading
simultaneous multithreading
0.112005
Multithreaded Value Prediction · HPCA 2005
Processor architecture and microarchitecture
value prediction
0.112005
Multithreaded Value Prediction · HPCA 2005
Systems and software security › memory safety › memory corruption defense
buffer overflow protection
0.012004
Hardware and Binary Modification Support for Code Pointer Protection From Buffer Overflow · MICRO 2004
Systems and software security › memory protection
code-pointer integrity
0.012004
Hardware and Binary Modification Support for Code Pointer Protection From Buffer Overflow · MICRO 2004
Network security › intrusion detection and prevention
intrusion detection
0.012004
Deterministic Memory-Efficient String Matching Algorithms for Intrusion Detection · INFOCOM 2004
Systems and software security
memory safety
0.012004
Hardware and Binary Modification Support for Code Pointer Protection From Buffer Overflow · MICRO 2004
Algorithms and data structures › sequence algorithms › string algorithms › string matching
aho-corasick algorithm
0.012004
Deterministic Memory-Efficient String Matching Algorithms for Intrusion Detection · INFOCOM 2004
Algorithms and data structures › sequence algorithms › string algorithms
string matching
0.012004
Deterministic Memory-Efficient String Matching Algorithms for Intrusion Detection · INFOCOM 2004
Processor architecture and microarchitecture
speculative execution
0.012005
Multithreaded Value Prediction · HPCA 2005

Methods — techniques the papers use, named apart from their topics

deterministic string matching · 0.1aho-corasick · 0.1value speculation · 0.1trace-driven simulation · 0.1encryption hardware · 0.0binary modification · 0.0
YearPublicationVenuePosition
2014 Hot Chips 2014 Nvidia's denver processor
abstract
This article consists of a collection of slides from the author's conference presentation on the special features, system design and architectures, processing capabilities, and targeted markets for NVIDIA's Denver family of processors.
Darrell Boggs, Gary Brown, Bill Rozas, Nathan Tuck, K. S. Venkatraman
Hot Chips Symposium4
2005 Multithreaded Value Prediction
abstract
This paper introduces a technique which leverages value prediction and multithreading on a simultaneous multithreading processor to achieve higher performance in a single threaded application. By allowing the value-speculative execution to proceed in a separate thread, this technique overcomes barriers that make traditional value prediction relatively ineffective for tolerating long latency loads. It shows that this technique can be as much as 2-5 times more effective than traditional value prediction, achieving more than 40% average performance gain on the SPEC benchmarks with realistic hardware parameters. These gains come from two effects: allowing greater separation between the stalled load and the speculative execution, and the ability to speculate on multiple values for a single load.
Nathan Tuck, Dean M. Tullsen
HPCA1
2004 Deterministic Memory-Efficient String Matching Algorithms for Intrusion Detection
abstract
Intrusion detection systems (IDSs) have become widely recognized as powerful tools for identifying, deterring and deflecting malicious attacks over the network. Essential to almost every intrusion detection system is the ability to search through packets and identify content that matches known attacks. Space and time efficient string matching algorithms are therefore important for identifying these packets at line rate. We examine string matching algorithms and their use for intrusion detection, in particular, we focus our efforts on providing worst-case performance that is amenable to hardware implementation. We contribute modifications to the Aho-Corasick string-matching algorithm that drastically reduce the amount of memory required and improve its performance on hardware implementations. We also show that these modifications do not drastically affect software performance on commodity processors, and therefore may be worth considering in these cases as well.
Nathan Tuck, Timothy Sherwood, Brad Calder, George Varghese
INFOCOM1
2004 Hardware and Binary Modification Support for Code Pointer Protection From Buffer Overflow
abstract
Buffer overflow vulnerabilities are currently the most prevalent security vulnerability; they are responsible for over half of the CERT advisories issued in the last three years. Since many attacks exploit buffer overflow vulnerabilities, techniques that prevent buffer overflow attacks would greatly increase the difficulty of writing a new worm. This paper examines both software and hardware solutions for protecting code pointers from buffer overflow attacks. We first evaluate the performance overhead of the existing Point-Guard software solution for protecting code pointers, and show that it can be applied using binary modification to protect return pointers on the stack. These software techniques guard against write attacks, but not read attacks, where an attacker is attempting to gain information about the pointer protection mechanism in order to later mount a write buffer attack. To address this, we examine encryption hardware to provide security for code pointers from read and write attacks. In addition, we show that pure software solutions can degrade program performance, and the light-weight encryption hardware techniques we examine can be used to provide protection with little performance overhead.
Nathan Tuck, Brad Calder, George Varghese
MICRO1