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N. N. Chan

dblp:89/1595 · DBLP profile ↗
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1ranked-venue papers
1as first author
0since 2021 · last 1985
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 1 · 1 first-author

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
1 paper
Integrated circuit design · 75% Electronic design automation · 25%

Topics — the 4 heaviest of 4, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Integrated circuit design
analog and mixed-signal circuits		 0.011985
Lump Partitioning of IC Bipolar Transistor Models for High-Frequency Applications · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 1985
Integrated circuit design › analog and mixed-signal circuits › device modeling
bipolar transistor modeling		 0.011985
Lump Partitioning of IC Bipolar Transistor Models for High-Frequency Applications · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 1985
Integrated circuit design › analog and mixed-signal circuits
device modeling		 0.011985
Lump Partitioning of IC Bipolar Transistor Models for High-Frequency Applications · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 1985
Electronic design automation › circuit modeling
parameter extraction		 0.011985
Lump Partitioning of IC Bipolar Transistor Models for High-Frequency Applications · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 1985

Methods — techniques the papers use, named apart from their topics

s-parameter extraction · 0.0finite element device simulation · 0.0
YearPublicationVenuePosition
1985 Lump Partitioning of IC Bipolar Transistor Models for High-Frequency Applications
abstract
A physical basis for parameter extraction of a two-lump bipolar transistor model for high-frequency applications is presented. S-parameter data taken from devices is compared to that generated from a two-lump model predicted by physical theory using 2-D finite element device simulation. Errors within 5 percent in magnitude and 5° in phase are obtained for all four S-parameters for a frequency range up to f/sub T/ and across the full current range. New physical understanding of the effects of dc current flow on high-frequency behavior of bipolar transistors is presented.
N. N. Chan, Robert W. Dutton
 IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.1