Demo Data from VLDB 2026 / reviewers in the wild / expert
K. S. Shankar
dblp:89/4057
· DBLP profile ↗
4ranked-venue papers
3as first author
0since 2021 · last 1982
—ORCID · none
Domains — the database's venue-derived domains; a paper can count in several
Software engineering, systems software and programming languages · 3 · 3 first-authorSystems, architecture and hardware · 1Applied, interdisciplinary, general and emerging computing · 1 · 1 first-author
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Software engineering, system software, and programming languages
1 paper |
Program verification · 87% Programming languages and type systems · 13% | |
| Computer architecture, parallel and distributed computing, and storage systems
1 paper |
Electronic design automation · 87% Processor architecture and microarchitecture · 13% | |
| Computer networks
1 paper |
Routing and switching · 100% |
Topics — the 6 heaviest of 7, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
Program verification › formal modeling
finite state machine specification |
0.0 | 1 | 1982 | A Functional Approach to Module Verification · IEEE Trans. Software Eng. 1982 |
Routing and switching
switching systems |
0.0 | 1 | 1976 | Dat Flow, Abstraction Levels and Specifications for Communications Switching Systems · ICSE 1976 |
Programming languages and type systems
functional programming |
0.0 | 1 | 1982 | A Functional Approach to Module Verification · IEEE Trans. Software Eng. 1982 |
Electronic design automation › hardware verification and test › formal verification
equivalence checking |
0.0 | 1 | 1974 | Automatic Testing for the Correctness and Equivalence of Loopfree Microprograms · IEEE Trans. Computers 1974 |
Electronic design automation
hardware verification and test |
0.0 | 1 | 1974 | Automatic Testing for the Correctness and Equivalence of Loopfree Microprograms · IEEE Trans. Computers 1974 |
Processor architecture and microarchitecture
microprogramming |
0.0 | 1 | 1974 | Automatic Testing for the Correctness and Equivalence of Loopfree Microprograms · IEEE Trans. Computers 1974 |
Methods — techniques the papers use, named apart from their topics
stepwise refinement · 0.0state machine modeling · 0.0testing techniques · 0.0formal modeling · 0.0
| Year | Publication | Venue | Position |
|---|---|---|---|
| 1982 | A Functional Approach to Module VerificationabstractThe purpose of this paper is to develop a method for designing and verifying data abstractions using the functional approach. Before doing so, the existing techniques for designing and verifying procedure and data abstractions will be surveyed briefly. These techniques will then be modified and extended to verify data abstractions. By using the concept of a mathematical function, one can model the behavior of a procedure abstraction and give a more uniform and clearer meaning to the stepwise refinement and verification of procedure abstractions. The concept of a state machine is then used as a basis to specify data abstractions. Using state machine specification, a technique for expressing the design of a data abstraction is then given. A method is then developed to verify the design of a data abstraction with respect to its specifications. K. S. Shankar |
IEEE Trans. Software Eng. | 1 |
| 1978 | Data structures, types and abstractionsabstractThe purpose of this paper is to explore the concepts and provide examples of data structures, data types and data abstractions The term data structures has been around for about 30 years; the term data type has been around for about 20 years; and the term data abstraction is a recent one and has been used for the last five years. All these terms are used widely today, and sometimes even interchangeably. After exploring the three terms, the similarities and differences between these will be pointed out and a unified way of looking at the three concepts will be presented. The clarity and precision in the presentation will be achieved by providing pictures wherever helpful, rather than through complex notations to make the reading light and easy. There are a total of 27 diagrams in the paper. The point is to get the key ideas across as easily as possible. K. S. Shankar |
COMPSAC | 1 |
| 1976 | Dat Flow, Abstraction Levels and Specifications for Communications Switching Systems
K. S. Shankar, C. Sekar Chandersekaran |
ICSE | 1 |
| 1974 | Automatic Testing for the Correctness and Equivalence of Loopfree MicroprogramsabstractCurrent architecture for microprogrammable machines vary widely. In order to avoid the applicability of the testing technique to a particular machine example, hardware, microware and microprograms are represented in a general fashion. This representation will account for a composite of features common to a large variety of contemporary machines. Such a general description seems to be absolutely necessary, when a comparison of two microprograms executing on different machines has to be made. After defining the model, correctness and equivalence of loopfree microprograms will be defined. The testing techniques are then developed. In the Appendix are shown two examples of straight line microprograms (for simplicity), to which the developed model is applied. C. V. Ramamoorthy, K. S. Shankar |
IEEE Trans. Computers | 2 |