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Shyamal K. Chowdhury

dblp:89/626 · DBLP profile ↗
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6ranked-venue papers
6as first author
0since 2021 · last 1994
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Computer networks · 3 · 3 first-authorSystems, architecture and hardware · 1 · 1 first-authorSoftware engineering, systems software and programming languages · 1 · 1 first-authorTheory of computation · 1 · 1 first-author

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer networks
3 papers
Network performance modeling · 56% Internet architecture and protocols · 19% Network optimization and economics · 14%
Computer architecture, parallel and distributed computing, and storage systems
1 paper
Performance modeling and evaluation · 100%

Topics — the 10 heaviest of 11, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Network performance modeling
queueing analysis
0.021991
Distribution of the Total Delay of Packets in Virtual Circuits · INFOCOM 1991
The Mean Resequencing Delay for M/H_K/infty Systems · IEEE Trans. Software Eng. 1989
Network optimization and economics › resource allocation
bandwidth allocation
0.011992
Alternative Bandwidth Allocation Algorithms for Packet Video in ATM Networks · INFOCOM 1992
Internet architecture and protocols
quality of service
0.011992
Alternative Bandwidth Allocation Algorithms for Packet Video in ATM Networks · INFOCOM 1992
Network performance modeling › delay analysis
delay distribution
0.011991
Distribution of the Total Delay of Packets in Virtual Circuits · INFOCOM 1991
Network performance modeling › delay analysis
resequencing delay
0.011989
The Mean Resequencing Delay for M/H_K/infty Systems · IEEE Trans. Software Eng. 1989
Performance modeling and evaluation
queueing models
0.011989
The Mean Resequencing Delay for M/H_K/infty Systems · IEEE Trans. Software Eng. 1989
Routing and switching
time slot assignment
0.011992
Alternative Bandwidth Allocation Algorithms for Packet Video in ATM Networks · INFOCOM 1992
Internet architecture and protocols
traffic management
0.011992
Alternative Bandwidth Allocation Algorithms for Packet Video in ATM Networks · INFOCOM 1992
Routing and switching › packet switching
virtual circuit
0.011991
Distribution of the Total Delay of Packets in Virtual Circuits · INFOCOM 1991
Transport protocols and congestion control
packet resequencing
0.011989
The Mean Resequencing Delay for M/H_K/infty Systems · IEEE Trans. Software Eng. 1989

Methods — techniques the papers use, named apart from their topics

queueing theory · 0.0asymptotic bound analysis · 0.0computer simulation · 0.0queueing model · 0.0generating function · 0.0
YearPublicationVenuePosition
1994 Bandwidth Allocation Algorithms for Packet Video in ATM Networks
Shyamal K. Chowdhury, Kazem Sohraby
Comput. Networks ISDN Syst.1
1992 Alternative Bandwidth Allocation Algorithms for Packet Video in ATM Networks
abstract
A two-node asynchronous transfer mode (ATM) network is considered. Several video sources are assumed multiplexed at the source node. Five alternative algorithms for bandwidth allocation to video sources are considered using: static-slot assignment, buffer-population-based dynamic slot assignment, first-come-first-serve slot assignment and rate-based dynamic slot assignment. The average cell delay and the coefficient of variation of the delay for the five algorithms are determined by computer simulation and compared. It is concluded that the adaptive slot assignment algorithm and the buffer-population-based dynamic slot assignment algorithm are suitable for packet video in ATM networks.>
Shyamal K. Chowdhury, Kazem Sohraby
INFOCOM1
1991 Distribution of the Total Delay of Packets in Virtual Circuits
abstract
In some computer network architectures a process communicates with another process across the network by establishing a virtual circuit. Consider a virtual circuit from node S to node D connected by multiple links. The delay suffered by the packets of the virtual circuit has three components: waiting time or queueing delay, service time or transmission delay, and resequencing delay. The sum of these is called the total delay. The author presents the distribution of the total delay for three different queuing models of node S: G/M/m model, G/M/ infinity model, and M/H/sub K// infinity model.>
Shyamal K. Chowdhury
INFOCOM1
1990 The Greedy Load Sharing Algorithm
Shyamal K. Chowdhury
J. Parallel Distributed Comput.1
1989 The Mean Resequencing Delay for M/H_K/infty Systems
abstract
The relationship between the mean resequencing delay and variations in packet transmission times is studied. Assuming a Poisson stream of packets, a K-stage hyperexponential transmission time distribution and an infinite number of equal capacity links connecting the source and destination nodes, the authors derive an expression for the mean resequencing delay. This result provides an upper bound on the mean resequencing delay for nodes connected by finitely many links. They observe that for the two-stage and three-stage hyperexponential distribution, the mean resequencing delay varies almost perfectly linearly with the squared coefficient of variation. An asymptotic bound analysis can explain this behavior.>
Shyamal K. Chowdhury
IEEE Trans. Software Eng.1
1987 Worst Case Performance of Weighted Buddy Systems
Shyamal K. Chowdhury, Pradip K. Srimani
Acta Informatica1