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Bin-Hong Lin

dblp:89/908 · DBLP profile ↗
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3ranked-venue papers
2as first author
0since 2021 · last 2000
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 2 · 2 first-authorGraphics, computer vision, multimedia, augmented reality and games · 1

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
1 paper
Electronic design automation · 100%

Topics — the 6 heaviest of 6, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Electronic design automation › hardware verification and test › design for testability
built-in self-test		 0.012000
A fast signature computation algorithm for LFSR and MISR · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2000
Electronic design automation
hardware verification and test		 0.012000
A fast signature computation algorithm for LFSR and MISR · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2000
Electronic design automation › hardware verification and test › design for testability › built-in self-test
linear feedback shift register		 0.012000
A fast signature computation algorithm for LFSR and MISR · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2000
Electronic design automation › hardware verification and test › design for testability › built-in self-test
multiple-input signature register		 0.012000
A fast signature computation algorithm for LFSR and MISR · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2000
Electronic design automation › hardware verification and test
signature computation		 0.012000
A fast signature computation algorithm for LFSR and MISR · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2000
Electronic design automation › hardware verification and test
test response compaction		 0.012000
A fast signature computation algorithm for LFSR and MISR · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2000

Methods — techniques the papers use, named apart from their topics

table look-up linear compaction · 0.0partial-input look-up tables · 0.0flying state look-up tables · 0.0
YearPublicationVenuePosition
2000 A fast signature computation algorithm for LFSR and MISR
abstract
A multiple-input signature register (MISR) computation algorithm for fast signature simulation is proposed. Based on the table look-up linear compaction algorithm and the modularity property of a single-input signature register (SISR), some new accelerating schemes-partial-input look-up tables and flying state look-up tables-are developed to boost the signature computation speed. Mathematical analysis and simulation results show that this algorithm has an order of magnitude speedup without extra memory requirement compared with the original linear compaction algorithm. Though this algorithm is derived for SISR, a simple conversion scheme exists that can convert internal-EXOR MISR to SISR. Consequently, fast MISR signature computation can be done.
Bin-Hong Lin, Shao-Hui Shieh, Cheng-Wen Wu
 IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.1
1996 A MISR Computation Algorithm for Fast Signature Simulation
abstract
A fast multiple input signature register (MISR) computation algorithm for signature simulation is proposed. Based on the linear compaction algorithm, the modularity property of a single input signature register (SISR), and the sparsity of the error-domain input, some new accelerating schemes-partial input look-up tables and reverse zero-checking policy-are developed to boost the signature computation speed. Mathematical analysis and simulation results show that this algorithm has an order of magnitude speedup without extra memory requirement compared with the linear compaction algorithm. Though originally derived for SISR, this algorithm is applicable to MISR by a simple conversion procedure or a bit-adjusting scheme with little effort. Consequently, a very fast MISR signature simulation can be achieved.
Bin-Hong Lin, Shao-Hui Shieh, Cheng-Wen Wu
 Asian Test Symposium1
1992 Adaptive notch filter by direct frequency estimation
Bor-Sen Chen, Tsang-Yi Yang, Bin-Hong Lin
 Signal Process.3