The authors provide tools for exploring the inherent parallelism introduced by design for testability (DFT) and built-in self-test (BIST) techniques in order to reduce test length. Since the potential for parallel test execution is most apparent at the organization level and DFT and BIST hardware is also often added at that level, the organization level is used as a foundation for the work. A broader modeling foundation that encompasses both dimensions, space and time, of test parallelism is introduced. A set of simple schedulability criteria for concurrent issuing of tests is developed. Effective suboptimum heuristic-based algorithms for scheduling tests on general-purpose high-performance VLSI system implementation are presented. The scheduling algorithms have been implemented and performance results are presented.>

Testing high-performance VLSI systems containing pipelines and multifunctional units is considered. An efficient heuristic-based algorithm is presented for scheduling tests in systems requiring unequal number of tests (UNT) for the test function. Performance results for an experimental implementation of the algorithm are presented.>

A powerful suboptimum heuristic for scheduling tests on general-purpose high-performance VLSI system implementations is presented. A simple model that represents a system and its organization, at any level, by a labeled resource allocation graph between test functions and test and system resources was introduced. The resource allocation graph was utilized to produce a scheduling model and a simple schedulability condition. An algorithm based on mechanisms for generating optimum schedules was presented. The algorithm performs a preliminary greedy scan for valid scheduling cycles. The partial scan seeds an iterative improvement procedure which utilizes a controlled incremental departure from local optima to schedule functions that require an equal number of tests. Methods to utilize the algorithm for a general number of tests per function were also outlined. The implementation of an experimental version of the algorithm showed good performance.>