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H. J. Huang

dblp:90/1779 · DBLP profile ↗
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3ranked-venue papers
2as first author
0since 2021 · last 2005
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 2 · 1 first-authorArtificial intelligence and machine learning · 1 · 1 first-authorTheory of computation · 1 · 1 first-author

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
1 paper
Embedded and real-time systems · 50% Performance modeling and evaluation · 50%

Topics — the 2 heaviest of 2, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Embedded and real-time systems
discrete event systems		 0.012003
Property-preserving composition of augmented marked graphs that share common resources · ICRA 2003
Performance modeling and evaluation
petri net modeling		 0.012003
Property-preserving composition of augmented marked graphs that share common resources · ICRA 2003

Methods — techniques the papers use, named apart from their topics

siphon and trap analysis · 0.0
YearPublicationVenuePosition
2005 Property-preserving subnet reductions for designing manufacturing systems with shared resources
H. J. Huang, To-Yat Cheung
 Theor. Comput. Sci.1
2003 Property-preserving composition of augmented marked graphs that share common resources
abstract
A large automatic system in manufacturing is usually composed of a set of subsystems sharing the usage of some resources. It is a major design issue to prove the liveness, boundedness and reversibility of the composite system. In this paper, the subsystems are modeled as augmented marked graphs. These augmented marked graphs are then composed into a composite system by merging those places representing the same sources. Conditions are provided under which siphons, traps, liveness, boundedness and reversibility of the subsystems are preserved in the composite system.
H. J. Huang, To-Yat Cheung
 ICRA1
1993 A BiCMOS Dynamic Divider Circuit Using a Restoring Iterative Architecture with Carry Look Ahead for CPU VLSI
James B. Kuo, Hung-Pin Chen 0001, H. J. Huang
 ISCAS3