This paper proposes an integrable analog domain linearization architecture for power amplifiers (PAs) in multi-input multi-output (MIMO) systems, using a spectrum shaping circuit with nonlinear feedback. This architecture consists of a nonlinear distortion extracting loop and an N-order spectrum shaping circuit. The extracting loop aligns the PA input and output signals in amplitude with a 180-degree phase difference and then adds them together to extract the nonlinear distortion signal. The spectrum shaping circuit reshapes the spectrum of the extracted nonlinear distortion signal using N identical analog chains but with different group delays and attenuation parameters, and finally injects it back to the PA input to suppress the nonlinear distortion of the target frequency. Moreover, the delay in the remaining spectrum shaping channels has multiple relationships to the first channel, which can be easily integrated into the PA design stage with low complexity. Particularly, the center frequency of the nonlinearity suppression can be easily shifted by modifying the attenuation parameters in the N-order spectrum shaping circuit. We designed the proposed architecture using off-the-shelf discrete components and demonstrated its nonlinear distortion suppression performance at different target frequencies for the PA chip CMPA006002F.

Significant intermodulation signals (IMD) are generated by power amplifiers in fully connected hybrid beamforming (FCHBF) networks. These IMD signals form beams that radiate in different directions and some high power beams generated by IMD signals can deviate from the linear beam direction. These beams can result in reduced energy efficiency, and interference to other users’ communications. This paper proposes a novel auxiliary channel architecture for linearizing FC HBF transmitters. The architecture addresses the problem of high power non-main beams in FC HBF arrays by compensating for nonlinearity using auxiliary channels. Furthermore, the full angle method, which combines beam-level DPD and auxiliary channel architecture, is introduced to linearize the main beams and improve the model identification accuracy by removing uncorrelated terms. For a two beam 512 element FC HBF uniform linear array, the simulation results show that the proposed DPD technique achieves an improvement of over 6 dB in the normalized mean square error (NMSE) in up to 90% of the directions, and 10 dB of NMSE improvement in 60% of directions.

In full-duplex multipath self-interference (SI), each of the resolvable multipath SI components consists of a group of non-resolvable (NR) components with similar delays. Since the transceiver cannot distinguish the NR components in reality, the canceller can only generate the approximate constructed SI to imperfectly cancel the received SI. This leads to residual SI remaining. This paper analyzes the effect of the NR components on the SI cancellation, and proposes a practical scheme to eliminate the residual SI caused by the NR components. First, a closed-form expression of the residual SI is obtained. Next, the average power of the residual SI and the SI cancellation ratio are derived to characterize the effect of NR components on SI cancellation in the multipath SI channel. Last, a switch scheme is proposed to eliminate the residual SI.

Full duplex radio is one of the most promising techniques for the fifth-generation (5G) wireless networks. It usually includes a feedback loop to capture the nonlinear distortion of the transmitted signal for linearization of power amplifiers (PAs) and nonlinear self-interference (SI) cancellation. This paper presents an FD transceiver architecture consisting of the digital predistortion (DPD), radio frequency (RF)-tapping SI cancellation, and baseband (BB)-tapping SI cancellation. In particular, the issue of high sampling rate required in the feedback loop is addressed, and a BB-tapping method, which adopts a nonlinear modeling method with a low-rate aliasing transmitted signal, is proposed to significantly reduce the required feedback sampling rate. Numerical results verify that by using the proposed BB-tapping cancellation, a sampling rate of 25 MSPS is enough for the feedback loop in the scenario of a 100 MHz source signal.

In this paper, a multiple-input multiple-output (MIMO) full-duplex (FD) transceiver design is proposed, which can mitigate the impact of phase noise and provide an enhanced self-interference cancellation capability. This design is featured by finely tuning the delay of the transmit oscillator signal and using it as the receive oscillator signal. To maximize the cancellation capability, a delay selection principle is developed to calculate the optimal oscillator delay. To further reduce the number of parameters needed in the delay calculation, a simplified principle is also developed with acceptable loss of cancellation capability. Compared to the traditional transceiver with a shared oscillator for its transmitter and receiver, the proposed design achieves an obvious improvement about 10 dB in terms of cancellation capability.

In wireless full-duplex communication systems, selfinterference (SI) cancellation is a key technique to ensure simultaneous transmission and reception on the same carrier frequency. During the SI cancellation, it has been shown that the oscillator phase noise dramatically affects the cancellation capability and thus needs consideration and suppression. In this paper, a novel time-domain digital SI cancellation approach is proposed to cancel the transmitter and receiver phase noises along with the incoming SI signal, without estimating either the SI channel response or the phase noise associated coefficients. For proofof-concept evaluation, simulations are performed on orthogonal frequency division multiplexing (OFDM)-modulated signals of 20 MHz bandwidth with 16 QAM constellations to verify the effectiveness of the proposed method. It is demonstrated that the proposed approach provides at least 3 dB improvement on the SI cancellation capability and at least 5 dB increase on the interference tolerance over the conventional cancellation approach that uses the frequency domain SI channel estimation.

Design of high-efficiency power amplifier (PA) is one of the key challenges to realize green radios, wherein digital predistortion (DPD) is deployed to reduce the PA's power back-off and thus increase its power efficiency. As the bandwidth of the transmit signal increases, stringent requirements are posed on the DPD linearization performance with limited sampling rate and dynamic range for the analog-to-digital converter (ADC) in the DPD feedback channel. In this paper, under a fixed ADC sampling rate, novel DPD architecture is proposed to compensate for the PA nonlinearity with limited ADC dynamic range. In the feedback channel of the proposed architecture, an extra radio frequency (RF) cancellation chain is introduced to eliminate the linear component of the PA amplified signal, and thus the requirement on the ADC dynamic range can be significantly reduced. Subsequently, by accurately estimating the loop delay and attenuation of the cancellation chain, the baseband replica of the RF cancelling signal is recovered, and the original PA output signal is rebuilt to estimate the DPD coefficients. Finally, experiments show that for the long term evolution (LTE)-advanced signals, the proposed architecture can achieve an adjacent channel leakage ratio lower than -47.6 dBc, which outperforms the conventional DPD by about 3.4 dB, with the effective bits of the ADC being reduced by 4.4 and a power added efficiency of 43.8% with 7.3 dB power back-off being observed for a fabricated Doherty PA with 50-dBm saturation power.

This paper presents the nonlinear effects of the analog self-interference (SI) canceller and a practical solution to suppress the nonlinear distortions in multiple-input multiple-output (MIMO) full-duplex wireless communication systems. Due to the inherent nonlinearities of the active radio frequency (RF) components used to tune the attenuations and the phase shifts in the analog SI cancellers, nonlinear distortions are introduced to the residual SI signal by the analog cancellation and enter the receive chain. In this paper, we build an extra feedback chain for each analog canceller to obtain the reference signal coupled from the transmitted RF signal and observe the characteristics of the canceller. Using the observations, we develop a nonlinear model including all the cancellers at each receive antenna with the presence of MIMO SI channel to estimate the nonlinear components. By subtracting the model estimates from the received signal instantaneously, the corresponding nonlinear distortions are effectively mitigated. After the nonlinearity mitigation, a linear digital cancellation scheme based on the Maximum Likelihood Estimation is applied to further reduce the residual SI signal caused by the MIMO SI channel to the noise floor. Experiments are performed on a 2x2 MIMO full-duplex testbed to validate the effectiveness of the proposed nonlinearity modeling and suppression method using Long Term Evolution signals of 20-MHz bandwidth.

The sampling clock accuracy of the digital predistortion (DPD) feedback path is limited by nonideal electronic components, which introduces random clock jitter and thus degrades the linearization performance. In this paper, we propose a new DPD architecture capable of estimating and mitigating the sampling clock jitter. The theoretical analysis reveals that the sampling clock jitter has a adverse effect on the signal-to-noise ratio (SNR) of the samples received and hence degrades the DPD performance. By applying the proposed reference injection method, the clock jitter can be estimated and mitigated, effectively. Simulation results demonstrate that the proposed DPD architecture can improve the normalized mean square error (NMSE) and the adjacent channel leakage ratio (ACLR) performances, compared with conventional DPD architecture when feedback sampling clock jitter is considered.