Demo Data from VLDB 2026 / reviewers in the wild / expert
Naveen Chandra
dblp:91/2032
· DBLP profile ↗
2ranked-venue papers
0as first author
0since 2021 · last 2005
—ORCID · unresolved
Domains — the database's venue-derived domains; a paper can count in several
Systems, architecture and hardware · 1Software engineering, systems software and programming languages · 1Theory of computation · 1
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Software engineering, system software, and programming languages
1 paper |
Program analysis · 50% Program verification · 50% | |
| Computer architecture, parallel and distributed computing, and storage systems
2 papers |
Electronic design automation · 79% Integrated circuit design · 21% | |
| Theoretical computer science
1 paper |
Automated reasoning and model checking · 100% |
Topics — the 5 heaviest of 5, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
Program analysis
dynamic analysis |
0.1 | 1 | 2005 | IODINE: a tool to automatically infer dynamic invariants for hardware designs · DAC 2005 |
Program verification
invariant generation |
0.1 | 1 | 2005 | IODINE: a tool to automatically infer dynamic invariants for hardware designs · DAC 2005 |
Electronic design automation › hardware verification and test
hardware verification |
0.1 | 1 | 2005 | IODINE: a tool to automatically infer dynamic invariants for hardware designs · DAC 2005 |
Automated reasoning and model checking
model checking |
0.0 | 1 | 2004 | A Toolset for Modelling and Verification of GALS Systems · CAV 2004 |
Integrated circuit design › asynchronous circuit design
globally asynchronous locally synchronous design |
0.0 | 1 | 2004 | A Toolset for Modelling and Verification of GALS Systems · CAV 2004 |
Methods — techniques the papers use, named apart from their topics
simulation-based property extraction · 0.1dynamic analysis · 0.1model checking · 0.1formal verification · 0.1
| Year | Publication | Venue | Position |
|---|---|---|---|
| 2005 | IODINE: a tool to automatically infer dynamic invariants for hardware designsabstractWe describe IODINE, a tool to automatically extract likely design properties using dynamic analysis. A practical bottleneck in the formal verication of hardware designs is the need to manually specify design-specic properties. IODINE presents a way to automatically extract properties such as state machine protocols, request-acknowledge pairs, and mutual exclusion between signals from design simulations. We show that dynamic invariant detection for hardware designs can infer relevant and accurate properties. Sudheendra Hangal, Naveen Chandra, Sridhar Narayanan, Sandeep Chakravorty |
DAC | 2 |
| 2004 | A Toolset for Modelling and Verification of GALS Systems
Sampada Sonalkar, Vijay D'Silva, Naveen Chandra, B. Vijayalakshmi |
CAV | 4 |