Demo Data from VLDB 2026 / reviewers in the wild / expert
Claudia U. Wieser
dblp:91/5867
· DBLP profile ↗
2ranked-venue papers
0as first author
0since 2021 · last 1994
—ORCID · none
Domains — the database's venue-derived domains; a paper can count in several
Systems, architecture and hardware · 2
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Computer architecture, parallel and distributed computing, and storage systems
2 papers |
Electronic design automation · 80% Embedded and real-time systems · 20% | |
| Theoretical computer science
1 paper |
Mathematical optimization · 100% |
Topics — the 5 heaviest of 6, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
Electronic design automation › design for manufacturability › statistical design
design centering |
0.0 | 1 | 1994 | Circuit analysis and optimization driven by worst-case distances · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 1994 |
Embedded and real-time systems › real-time scheduling
worst-case analysis |
0.0 | 1 | 1994 | Circuit analysis and optimization driven by worst-case distances · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 1994 |
Electronic design automation › design for manufacturability › design for yield
yield enhancement |
0.0 | 1 | 1994 | Circuit analysis and optimization driven by worst-case distances · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 1994 |
Electronic design automation
design for manufacturability |
0.0 | 1 | 1993 | Improved Methods for Worst-Case Analysis and Optimization Incorporating Operating Tolerances · DAC 1993 |
Mathematical optimization › optimization under uncertainty
robust optimization |
0.0 | 1 | 1993 | Improved Methods for Worst-Case Analysis and Optimization Incorporating Operating Tolerances · DAC 1993 |
Methods — techniques the papers use, named apart from their topics
worst-case analysis · 0.0monte carlo simulation · 0.0worst-case distance · 0.0deterministic parametric optimization · 0.0
| Year | Publication | Venue | Position |
|---|---|---|---|
| 1994 | Circuit analysis and optimization driven by worst-case distancesabstractIn this paper, a new methodology for integrated circuit design considering the inevitable manufacturing and operating tolerances is presented. It is based on a new concept for specification analysis that provides exact worst-case transistor model parameters and exact worst-case operating conditions. Corresponding worst-case distances provide a key measure for the performance, the yield, and the robustness of a circuit. A new deterministic method for parametric circuit design that is based on worst-case distances is presented. It comprises nominal design, worst-case analysis, yield optimization, and design centering. In contrast to current approaches, it uses standard circuit simulators and at the same time considers deterministic design parameters of integrated circuits at reasonable computational costs. The most serious disadvantage of geometric approaches to design centering is eliminated, as the method's complexity increases only linearly with the number of design variables.> Kurt Antreich, Helmut E. Graeb, Claudia U. Wieser |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. | 3 |
| 1993 | Improved Methods for Worst-Case Analysis and Optimization Incorporating Operating TolerancesabstractWorst-case analysis is commonly used in integrated circuit design to verify a satisfactory circuit performance with regard to changes in the manufacturing conditions. However, worst-case analysis is often carried out using approximate worst-case parameter sets, that do not consider fluctuations in the operating conditions. This paper presents a new approach to the worst-case design of integrated circuits that takes account of fluctuations in the operating conditions. It provides unique and realistic worst-case manufacturing conditions and worst-case operating conditions for given circuit specifications. These specifications may be either, minimum yield requirements or, lower and upper performance bounds. A software package for worst-case analysis and optimization is presented and illustrated by two examples. Helmut E. Graeb, Claudia U. Wieser, Kurt Antreich |
DAC | 2 |