Our team is developing an integrated algorithm analysis and mapping environment for migrating a dataflow representation of a signal processing algorithm into an Adaptive Computing System (ACS) consisting of FPGAs. This environment allows designers to transform signal processing algorithms into FPGA-based hardware faster, by an order of magnitude, than is currently possible. Our approach has been to focus on three areas of capability critical to the success of adaptive computing: algorithm analysis, algorithm mapping, and smart generators. These capabilities are being implemented as extensions to the Ptolemy design environment developed at the University of California, Berkeley (http://ptolemy.cecs.berkeley.edu). Our tools were used to automatically implement a Winograd DFT and a high speed linear FM detector. In both cases, our tools simulated the algorithm, selected appropriate fixed point representations, and generated the VHDL implementations. The final FPGA designs were obtained by synthesizing the VHDL and performing place and route with commercial tools.

We are developing an integrated algorithm analysis and mapping environment particularly tailored for signal processing applications on Adaptive Computing Systems (ACS). Our environment allows a designer to map signal processing algorithms to an ACS faster, by an order of magnitude, than is currently possible.

A perennial problem in the process of developing signal processing systems is identifying an architecture which meets the computational and memory needs of the algorithm yet is still affordable in terms of cost, size, and complexity. To aid in making this decision, an architecture trade tool, using the Ptolemy kernel, has been developed. The purpose of this tool is to provide the user with an easy mechanism of specifying a mapping of algorithmic functional blocks onto an architecture, and simulating its performance. The goal is to allow the user to quickly evaluate many architectures and mappings at a high-level to determine whether or not they satisfy basic criteria, and warrant further investigation. These criteria include computational and memory requirements as well as other system metrics (e.g. size, power, and reliability, etc.) which are often important in selecting an architecture.