This paper presents a novel prediction based digital control dc-dc converter. In this method, addition to the P-I-D control as the feedback control, the prediction based control is used as the feedfoward control. In the feedfoward control, the neural network based method is adopted. This works to improve the transient response very effectively when the load is changed quickly. As a result, the undershoot of the output voltage and the overshoot of the reactor current are suppressed effectively as compared with the conventional one in the step change of load resistance. It is confirmed that the prediction based control technique is useful to realize the high performance digital control method for the dc-dc converter.

Three kinds of feedthrough assignment algorithm are suggested for CMOS logic cell layout, and their solutions and processing times are compared. One is based on the idea that the feedthrough requirement with fewest feedthrough candidates is first assigned. The second is an optimum algorithm that solves the problem by formalizing it as an integer programming problem. The third is a combination of the two, in which the first algorithm is applied until all of the uniquely determined feedthroughs are assigned, and then the second one is applied. The second and third algorithms attain the optimum solution, but the first one does- not. The deviation of the first algorithm from the optimum solution is shown to be within 3.5% of the optimum. and the cell area increases less than 3.5%. The processing times of the first and third algorithms are 1/27.5 and 1/3.0, respectively, on average, of that of the optimum one. Thus it is concluded that the first algorithm, although not optimum, is practical, and may well be incorporated into the feedthrough assignment process.>

A permeation routing algorithm is proposed which decides the detailed routes on a new layout model. The permeation router attains a higher density by using the expanded routing region as well as the conventional one simultaneously. This routing algorithm consists of two phases. One is to partition the trunk set into three subsets corresponding to the trunks to be routed in the channel on the lower transistor row, upper transistor row, or between transistor rows. The other is to route these channels by using the one-layer channel assignment method as well as the conventional one. The experiments show that the routing results are practical and that the processing time is proportional to the number of trunks to the power of 1.4.