We present a new parallel programming tool environment that is (1) accessible and executable "anytime, anywhere," through standard Web browsers and (2) integrated in that it provides tools that adhere to a common underlying methodology for parallel programming and performance tuning. The environment is based on a new network computing infrastructure, developed at Purdue University. We evaluate our environment qualitatively by comparing our tool access method with conventional schemes of software download and installation. We also quantitatively evaluate the efficiency of interactive tool access in our environment. We do this by measuring the response times of various functions of the URSA MINOR tool and compare them with those of a Java Applet-based "anytime, anywhere" tool access method. We found that our environment offers significant advantages in terms of tool accessibility, integration, and efficiency.

Scan design can be viewed as scanning flip-flops, so that faults, otherwise aborted, are detected by meeting propagation and justification requirements. In this paper, we propose a new method which identifies justification and propagation requirements of aborted faults through combinational test generation and selects flip-flops to meet the requirements. Two procedures, optimal and heuristic, were considered in the process. We implemented the heuristic procedure in a program called BELLONA. BELLONA selects flip-flops progressively to lead to high fault efficiency. Our experimental results show that BELLONA achieves 100% fault efficiency for all circuits experimented with, on average, 19% of flip-flops selected.