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Barry R. Borgerson

dblp:92/3775 · DBLP profile ↗
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2ranked-venue papers
2as first author
0since 2021 · last 1979
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 2 · 2 first-authorSoftware engineering, systems software and programming languages · 1 · 1 first-author

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
2 papers
Processor architecture and microarchitecture · 43% Hardware reliability and fault tolerance · 38% Distributed systems · 19%

Topics — the 4 heaviest of 5, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Processor architecture and microarchitecture
instruction set architecture
0.011979
The Architecture of Sperry Univac 1100 Series Systems · ISCA 1979
Distributed systems › fault tolerance › resilience
graceful degradation
0.011975
A Reliability Model for Gracefully Degrading and Standby-Sparing Systems · IEEE Trans. Computers 1975
Hardware reliability and fault tolerance
reliability modeling
0.011975
A Reliability Model for Gracefully Degrading and Standby-Sparing Systems · IEEE Trans. Computers 1975
Hardware reliability and fault tolerance › redundancy
standby sparing
0.011975
A Reliability Model for Gracefully Degrading and Standby-Sparing Systems · IEEE Trans. Computers 1975
YearPublicationVenuePosition
1979 The Architecture of Sperry Univac 1100 Series Systems
abstract
This paper presents an overview of the architecture of the SPERRY UNIVAC® 1100 Series systems. The principal topics are instruction and data formats, main storage and addressing, process management, and I/O.
Barry R. Borgerson, Michael D. Godfrey, Patrick E. Hagerty, T. R. Rykken
ISCA1
1975 A Reliability Model for Gracefully Degrading and Standby-Sparing Systems
abstract
A model for analyzing the reliability of gracefully degrading and standby-sparing computer systems is developed. The basis of the model is the identification of four distinct causes of crashes: time-domain multiple faults, resource exhaustion, space-domain multiple faults, and solitary faults. Expressions are developed for each of these crash-causing mechanisms and for their interrelationship. The model is then demonstrated by using it to analyze the reliability of a gracefully degrading computer system called PRIME.
Barry R. Borgerson, Richard F. Freitas
IEEE Trans. Computers1