MOTIVATION: The genome projects produce a wealth of protein sequences. Theoretical methods to predict possible structures and functions are needed for screening purposes, large-scale comparisons and in-depth analysis to identify worthwhile targets for further experimental research. Sequence-structure alignment is a basic tool for the identification of model folds for protein sequences and the construction of crude structural models. Empirical contact potentials (potentials of mean force) are used to optimize and evaluate such alignments. RESULTS: We propose new scoring schemes based on a contact definition derived from Voronoi decompositions of the three-dimensional coordinates of protein structures. We demonstrate that Voronoi potentials are superior to pure distance-based contact potentials with respect to recognition rate and significance for native folds. Moreover, the scoring scheme has the potential to provide a reasonable balance of detail and ion such that it is also useful for the recognition of distantly related (both homologous and non-homologous) proteins. This is demonstrated here on a set of structural alignments showing much better correspondence of native and model scores for the Voronoi potentials as compared to conventional distance-based potentials. AVAILABILITY: The potentials are made available via the program system ToPLign (URL: http://cartan.gmd.de/ToPLign.html). CONTACT: Ralf.Zimmer,[email protected]

Due to the application of fast device technologies and the increasing complexity of printed-circuit boards, electromagnetic phenomena, e.g. reflections and crosstalk, gain more and more importance and may even disturb the function of a circuit. In the future, it will be indispensable to already consider phenomena of electromagnetic compatibility (EMC) during layout synthesis. In this paper, robust methods are presented that make it possible for the first time to incorporate complex EMC constraints and cost criteria into printed-circuit board routing. This includes both concepts for the development and specification of EMC design models and robust and efficient algorithms for EMC-driven routing that can handle these models.>

The authors point out that, in order to perform the design of printed circuit boards as time- and cost-efficiently as possible, electromagnetic compatability (EMC) phenomena have to be taken into account during layout synthesis. The EMC router HERO offers a robust framework for incorporating EMC constraints and cost criteria into routing. Using HERO, it will not be possible to obtain a completely failsafe layout, in general. However, experimental results for typical boards prove that a great number of EMC problems can be avoided during layout synthesis and that the effects of EMC phenomena can be reduced substantially. Detailed reports of EMC design rule violations provide effective input to the succeeding EMC verification phase. Violations of EMC design rules are mainly caused by an inappropriate placement. Therefore, it seems to be of great promise to combine hierarchical placement methods with this approach for hierarchical routing.>