Raúl Silvera

dblp:93/4151 · DBLP profile ↗
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9ranked-venue papers
0as first author
0since 2021 · last 2016
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Software engineering, systems software and programming languages · 6Systems, architecture and hardware · 4

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Software engineering, system software, and programming languages
3 papers
Concurrent programming · 49% Runtime systems and virtual machines · 24% Compilers and program optimization · 24%
Computer architecture, parallel and distributed computing, and storage systems
3 papers
Performance modeling and evaluation · 68% Memory systems · 17% Processor architecture and microarchitecture · 15%

Topics — the 10 heaviest of 10, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Concurrent programming › transactional memory
hardware transactional memory
0.212015
Software Support and Evaluation of Hardware Transactional Memory on Blue Gene/Q · IEEE Trans. Computers 2015
Concurrent programming
transactional memory
0.212015
Software Support and Evaluation of Hardware Transactional Memory on Blue Gene/Q · IEEE Trans. Computers 2015
Runtime systems and virtual machines › parallel runtime systems
transactional memory runtime
0.212015
Software Support and Evaluation of Hardware Transactional Memory on Blue Gene/Q · IEEE Trans. Computers 2015
Compilers and program optimization › dynamic optimization
profile-guided optimization
0.112012
Exploiting inter-sequence correlations for program behavior prediction · OOPSLA 2012
Performance modeling and evaluation
program behavior prediction
0.112012
Exploiting inter-sequence correlations for program behavior prediction · OOPSLA 2012
Performance modeling and evaluation
workload characterization
0.112012
Exploiting inter-sequence correlations for program behavior prediction · OOPSLA 2012
Compilers and program optimization › memory optimization
data layout optimization
0.112007
Forma: A framework for safe automatic array reshaping · ACM Trans. Program. Lang. Syst. 2007
Memory systems
data locality
0.112007
Forma: A framework for safe automatic array reshaping · ACM Trans. Program. Lang. Syst. 2007
Processor architecture and microarchitecture › transactional execution
hardware transactional memory support
0.112015
Software Support and Evaluation of Hardware Transactional Memory on Blue Gene/Q · IEEE Trans. Computers 2015
Program analysis › static analysis
pointer analysis
0.012007
Forma: A framework for safe automatic array reshaping · ACM Trans. Program. Lang. Syst. 2007

Methods — techniques the papers use, named apart from their topics

software transactional memory · 0.4best-effort HTM · 0.4statistical correlation analysis · 0.3sequence prediction · 0.3field-sensitive alias analysis · 0.1data type checking · 0.1
YearPublicationVenuePosition
2016 SafeType: detecting type violations for type-basedalias analysis of C
abstract
Summary To improve the ability of compilers to determine alias relations in a program, the C standard restricts the types of expressions that may access objects in memory. In practice, however, many existing C programs do not conform to these restrictions, making type‐based alias analysis unsound for those programs. As a result, type‐based alias analysis is frequently disabled. Existing approaches for verifying type safety exist within larger frameworks designed to verify overall memory safety, requiring both static analysis and runtime checks. This paper describes the motivation for analyzing the safety of type‐based alias analysis independently; presents SafeType, a purely static approach to detection of violations of the C standard's restrictions on memory accesses; describes an implementation of SafeType in the IBM XL C compiler, with flow‐sensitive and context‐sensitive queries to handle variables with typevoid *; evaluates that implementation, showing that it scales to programs with hundreds of thousands of lines of code; and uses SafeType to identify a previously unreported violation in the470.lbmbenchmark in SPEC CPU2006. Copyright © 2015 John Wiley & Sons, Ltd.
Iain Ireland, José Nelson Amaral, Raúl Silvera, Shimin Cui
Softw. Pract. Exp.3
2015 Software Support and Evaluation of Hardware Transactional Memory on Blue Gene/Q
abstract
This paper describes an end-to-end system implementation of a transactional memory (TM) programming model on top of the hardware transactional memory (HTM) of the Blue Gene/Q machine. The TM programming model supports most C/C++ programming constructs using a best-effort HTM and the help of a complete software stack including the compiler, the kernel, and the TM runtime. An extensive evaluation of the STAMP and the RMS-TM benchmark suites on BG/Q is the first of its kind in understanding characteristics of running TM workloads on real hardware TM. The study reveals several interesting insights on the overhead and the scalability of BG/Q HTM with respect to sequential execution, coarse-grain locking, and software TM.
Amy Wang, Matthew Gaudet, Peng Wu 0001, Martin Ohmacht, José Nelson Amaral, Christopher Barton, Raúl Silvera, Maged M. Michael
IEEE Trans. Computers7
2013 Simple Profile Rectifications Go a Long Way - Statistically Exploring and Alleviating the Effects of Sampling Errors for Program Optimizations
Bo Wu 0002, Mingzhou Zhou, Xipeng Shen, Yaoqing Gao, Raúl Silvera, Graham Yiu
ECOOP5
2012 Evaluation of blue Gene/Q hardware support for transactional memories
abstract
This paper describes an end-to-end system implementation of the transactional memory (TM) programming model on top of the hardware transactional memory (HTM) of the Blue Gene/Q (BG/Q) machine. The TM programming model supports most C/C++ programming constructs on top of a best-effort HTM with the help of a complete software stack including the compiler, the kernel, and the TM runtime.
Amy Wang, Matthew Gaudet, Peng Wu 0001, José Nelson Amaral, Martin Ohmacht, Christopher Barton, Raúl Silvera, Maged M. Michael
PACT7
2012 A Practical Approach to DOACROSS Parallelization
Priya Unnikrishnan, Jun Shirako, Kit Barton, Sanjay Chatterjee, Raúl Silvera, Vivek Sarkar
Euro-Par5
2012 Exploiting inter-sequence correlations for program behavior prediction
abstract
Prediction of program dynamic behaviors is fundamental to program optimizations, resource management, and architecture reconfigurations. Most existing predictors are based on locality of program behaviors, subject to some inherent limitations. In this paper, we revisit the design philosophy and systematically explore a second source of clues: statistical correlations between the behavior sequences of different program entities. Concentrated on loops, it examines the correlations' existence, strength, and values in enhancing the design of program behavior predictors. It creates the first taxonomy of program behavior sequence patterns. It develops a new form of predictors, named sequence predictors, to effectively translate the correlations into large-scope, proactive predictions of program behavior sequences. It demonstrates the usefulness of the prediction in dynamic version selection and loop importance estimation, showing 19% average speedup on a number of real-world utility applications. By taking scope and timing of behavior prediction as the first-order design objectives, the new approach overcomes limitations of existing program behavior predictors, opening up many new opportunities for runtime optimizations at various layers of computing.
Bo Wu 0002, Zhijia Zhao 0001, Xipeng Shen, Yunlian Jiang, Yaoqing Gao, Raúl Silvera
OOPSLA6
2009 Workload Reduction for Multi-input Feedback-Directed Optimization
abstract
Feedback-directed optimization is an effective technique to improve program performance, but it may result in program performance and compiler behavior that is sensitive to both the selection of inputs used for training and the actual input in each run of the program. Cross-validation over a workload of inputs can address the input-sensitivity problem, but introduces the need to select a representative workload of minimal size from the population of available inputs. We present a compiler-centric clustering methodology to group similar inputs so that redundant inputs can be eliminated from the training workload. Input similarity is determined based on the compile-time code transformations made by the compiler after training separately on each input. Differences between inputs are weighted by a performance metric based on cross-validation in order to account for code transformation differences that have little impact on performance. We introduce theCrossErrormetric that allows the exploration of correlations between transformations based on the results of clustering. The methodology is applied to several SPEC benchmark programs, and illustrated using selected case studies.
Paul Berube, José Nelson Amaral, Rayson Ho, Raúl Silvera
CGO4
2008 MPADS: memory-pooling-assisted data splitting
abstract
This paper describes Memory-Pooling-Assisted Data Splitting (MPADS), a framework that combines data structure splitting with memory pooling --- Although it MPADS may call to mind memory padding, a distintion of this framework is that is does not insert padding. MPADS relies on pointer analysis to ensure that splitting is safe and applicable to type-unsafe language. MPADS makes no assumption about type safety. The analysis can identify cases in which the transformation could lead to incorrect code and thus MPADS abandons those cases.
Stephen Curial, José Nelson Amaral, Yaoqing Gao, Shimin Cui, Raúl Silvera, Roch Archambault
ISMM6
2007 Forma: A framework for safe automatic array reshaping
abstract
This article presents Forma , a practical, safe, and automatic data reshaping framework that reorganizes arrays to improve data locality. Forma splits large aggregated data-types into smaller ones to improve data locality. Arrays of these large data types are then replaced by multiple arrays of the smaller types. These new arrays form natural data streams that have smaller memory footprints, better locality, and are more suitable for hardware stream prefetching. Forma consists of a field-sensitive alias analyzer, a data type checker, a portable structure reshaping planner, and an array reshaper. An extensive experimental study compares different data reshaping strategies in two dimensions: (1) how the data structure is split into smaller ones ( maximal partition × frequency-based partition × affinity-based partition ); and (2) how partitioned arrays are linked to preserve program semantics ( address arithmetic-based reshaping × pointer-based reshaping ). This study exposes important characteristics of array reshaping. First, a practical data reshaper needs not only an inter-procedural analysis but also a data-type checker to make sure that array reshaping is safe. Second, the performance improvement due to array reshaping can be dramatic: standard benchmarks can run up to 2.1 times faster after array reshaping. Array reshaping may also result in some performance degradation for certain benchmarks. An extensive micro-architecture-level performance study identifies the causes for this degradation. Third, the seemingly naive maximal partition achieves best or close-to-best performance in the benchmarks studied. This article presents an analysis that explains this surprising result. Finally, address-arithmetic-based reshaping always performs better than its pointer-based counterpart.
Shimin Cui, Yaoqing Gao, Raúl Silvera, José Nelson Amaral
ACM Trans. Program. Lang. Syst.4