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Julio L. Medina

dblp:95/351 · also Julio Luis Medina Pasaje · DBLP profile ↗
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9ranked-venue papers
2as first author
1since 2021 · last 2023
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 3Software engineering, systems software and programming languages · 3 · 1 first-authorComputer networks · 1Applied, interdisciplinary, general and emerging computing · 1 · 1 first-author

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
1 paper
Embedded and real-time systems · 100%

Topics — the 2 heaviest of 2, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Embedded and real-time systems › real-time system design
real-time system modeling
0.012001
MAST Real-Time View: A Graphic UML Tool for Modeling Object-Oriented Real-Time System · RTSS 2001
Embedded and real-time systems › real-time scheduling
schedulability analysis
0.012001
MAST Real-Time View: A Graphic UML Tool for Modeling Object-Oriented Real-Time System · RTSS 2001

Methods — techniques the papers use, named apart from their topics

worst-case schedulability analysis · 0.0discrete-event simulation · 0.0
YearPublicationVenuePosition
2023 From FMTV to WATERS: Lessons Learned from the First Verification Challenge at ECRTS (Invited Paper)
abstract
We present here the main features and lessons learned from the first edition of what has now become the ECRTS industrial challenge, together with the final description of the challenge and a comparative overview of the proposed solutions. This verification challenge, proposed by Thales, was first discussed in 2014 as part of a dedicated workshop (FMTV, a satellite event of the FM 2014 conference), and solutions were discussed for the first time at the WATERS 2015 workshop. The use case for the verification challenge is an aerial video tracking system. A specificity of this system lies in the fact that periods are constant but known with a limited precision only. The first part of the challenge focuses on the video frame processing system. It consists in computing maximum values of the end-to-end latency of the frames sent by the camera to the display, for two different buffer sizes, and then the minimum duration between two consecutive frame losses. The second challenge is about computing end-to-end latencies on the tracking and camera control for two different values of jitter. Solutions based on five different tools - Fiacre/Tina, CPAL (simulation and analysis), IMITATOR, UPPAAL and MAST - were submitted for discussion at WATERS 2015. While none of these solutions provided a full answer to the challenge, a combination of several of them did allow to draw some conclusions.
Sebastian Altmeyer, Étienne André 0001, Silvano Dal-Zilio, Loïc Fejoz, Michael González Harbour, Susanne Graf, J. Javier Gutiérrez, Rafik Henia, Didier Le Botlan, Giuseppe Lipari, Julio L. Medina, Nicolas Navet, Sophie Quinton, Juan Maria Rivas, Youcheng Sun
ECRTS11
2017 High-Level Design of Wireless Sensor Networks for Performance Optimization Under Security Hazards
abstract
The increasing complexity of current wireless sensor networks requires efficient methodologies to fulfill the strict constraints typically imposed in terms of power consumption and system performance. Furthermore, security issues are also becoming key features due to their impact on system behavior. As a consequence, new design frameworks are required to enable developers to model and address security risks from the very beginning of the WSN design process, while optimizing system performance. For this purpose, this article presents a design framework for modeling and simulating WSNs under external attacks. In this framework, the WSN is specified by using UML/MARTE models, from which automatic code generation enables fast, host-compiled simulation. The resulting information enables early detection of weaknesses in WSN designs and simplifies further exploration of design solutions. Minor modifications in the UML models are sufficient to automatically simulate and evaluate each design alternative in an iterative way. As a result, designers can develop more secure and optimized WSN systems with reduced design times and effort.
Pablo Peñil, Álvaro Díaz Suárez, Héctor Posadas, Julio L. Medina, Pablo Sánchez Espeso
ACM Trans. Sens. Networks4
2016 CONTREX: Design of Embedded Mixed-Criticality CONTRol Systems under Consideration of EXtra-Functional Properties
abstract
The increasing processing power of today's HW/SW platforms leads to the integration of more and more functions in a single device. Additional design challenges arise when these functions share computing resources and belong to different criticality levels. The paper presents the CONTREX European project and its preliminary results. CONTREX complements current activities in the area of predictable computing platforms and segregation mechanisms with techniques to consider the extra-functional properties, i.e., timing constraints, power, and temperature. CONTREX enables energy efficient and cost aware design through analysis and optimization of these properties with regard to application demands at different criticality levels.
Ralph Görgen, Kim Grüttner, Fernando Herrera, Pablo Peñil, Julio L. Medina, Eugenio Villar, Gianluca Palermo, William Fornaciari, Carlo Brandolese, Davide Gadioli, Sara Bocchio, Luca Ceva, Paolo Azzoni, Massimo Poncino, Sara Vinco, Enrico Macii, Salvatore Cusenza, John M. Favaro, Raúl Valencia, Ingo Sander, Kathrin Rosvall, Davide Quaglia
DSD5
2015 Extensions to the UML profile for MARTE for distributed embedded systems
abstract
The design of distributed embedded systems is a challenging task that requires raising the level of abstraction to handle the different involved concerns. In particular, standard modeling languages and precise semantics specification are necessary to address the networking-related aspects at a high level of abstraction. The Unified Modeling Language (UML) and its MARTE profile are valid formalisms to model real-time embedded systems but they lack precise modeling elements when addressing applications and platforms forming distributed embedded systems. In this work, we formalize a coherent set of modeling elements for the design and deployment of distributed embedded systems. A novel UML profile for networking is proposed as a semantic and syntactic extension to the UML Profile for MARTE: The Network Profile.
Emad Samuel Malki Ebeid, Julio L. Medina, Davide Quaglia, Franco Fummi
FDL2
2013 Model driven engineering at work
Gjalt de Jong, Julio L. Medina
FDL2
2013 Modeling languages extensions and best practices
Julio L. Medina, Gjalt de Jong
FDL1
2007 Integration of a flexible time triggered network in the FRESCOR resource contracting framework
abstract
In this paper we overview the integration of a framework that generically manages the system resources in the form of contracts, namely the FRESCOR framework, with a flexible network resource. We describe how a network resource, namely FTT-SE, supports the FRESCOR framework services and, likewise, how the network services are made available to the application through the contracting framework. In a designer perspective, we also describe how a typical distributed application can be easily deployed using such a framework.
Ricardo Marau, Luís Almeida 0001, Paulo Pedreiras, Michael González Harbour, Daniel Sangorrín, Julio L. Medina
ETFA6
2001 MAST Real-Time View: A Graphic UML Tool for Modeling Object-Oriented Real-Time System
abstract
This paper describes a methodology and a framework for building an analyzable real-time model of an object oriented system that is developed using a UML CASE tool. The real-time model is formulated by a new UML view named "MAST RT View". This view allows the designer to gradually build the real-time model according to the phase of the development process, to feed data into the analysis tools, and to bring the relevant timing responses back into the model. The MAST RT View has three models: the processing capacity of the hardware/software platform; the timing behavior of the application logical components; and the workload and the timing requirements of each real-time situation to be analyzed. This view is analyzable by the MAST set of tools, which includes worst-case schedulability analysis and discrete event simulation for hard and soft timing requirements.
Julio L. Medina, Michael González Harbour, José M. Drake
RTSS1
1993 CDPU for SOHO-CEPAC collaboration
Daniel Meziat, J. Sequeiros, Julio L. Medina, Sebastián Sánchez 0001
Microprocess. Microprogramming3