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Gabriel Kerneis

dblp:95/8775 · DBLP profile ↗
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2ranked-venue papers
1as first author
0since 2021 · last 2015
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 1Software engineering, systems software and programming languages · 1 · 1 first-author

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
1 paper
Memory systems · 33% Distributed systems · 33% Processor architecture and microarchitecture · 33%
Software engineering, system software, and programming languages
1 paper
Program verification · 100%

Topics — the 2 heaviest of 4, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Memory systems › memory consistency
memory consistency model		 0.212015
An integrated concurrency and core-ISA architectural envelope definition, and test oracle, for IBM POWER multiprocessors · MICRO 2015
Distributed systems › consistency models
weak consistency		 0.212015
An integrated concurrency and core-ISA architectural envelope definition, and test oracle, for IBM POWER multiprocessors · MICRO 2015

Methods — techniques the papers use, named apart from their topics

architectural envelope definition · 0.4
YearPublicationVenuePosition
2015 An integrated concurrency and core-ISA architectural envelope definition, and test oracle, for IBM POWER multiprocessors
abstract
Weakly consistent multiprocessors such as ARM and IBM POWER have been with us for decades, but their subtle programmer-visible concurrency behaviour remains challenging, both to implement and to use; the traditional architecture documentation, with its mix of prose and pseudocode, leaves much unclear.
Kathryn E. Gray, Gabriel Kerneis, Dominic P. Mulligan, Christopher Pulte, Susmit Sarkar, Peter Sewell
 MICRO2
2014 QEMU/CPC: static analysis and CPS conversion for safe, portable, and efficient coroutines
abstract
Coroutines and events are two common abstractions for writing concurrent programs. Because coroutines are often more convenient, but events more portable and efficient, it is natural to want to translate the former into the latter. CPC is such a source-to-source translator for C programs, based on a partial conversion into continuation-passing style (CPS conversion) of functions annotated as cooperative.
Gabriel Kerneis, Charlie Shepherd, Stefan Hajnoczi
 PEPM1