This research article offers a floating memristor model using single voltage difference transconductance amplifier (VDTA) and grounded passive components. The proper utilization of VDTA port characteristics with passive components exhibits both incremental and decremental modes of operation without multiplier circuit. The performance analysis of proposed memristor is verified by using post layout Cadence Virtuoso simulation to examine the characteristics of all possible temperature and process Corners. In addition, experimental verification of VDTA-based memristor is done using commercially available operational transconductance amplifier (OTA) as IC CA3080. The results obtained through simulation and experiment follows the theoretical aspects. Moreover, an application perspective of the proposed design includes a brief neuromorphic circuit implementation for Pavlovian associative learning experiment.

This research article comes with a grounded as well as floating meminductor using voltage difference transconductance amplifier (VDTA). The proposed meminductor models have only two active VDTA and grounded capacitors each. The performance evaluation of the proposed meminductor is verified using post-layout simulation in the Cadence Virtuoso tool and experimentally using off the self component such as operational transconductance amplifier (OTA) for the implementation of VDTA with passive components. Moreover, neuromorphic circuit implementation as an application of the proposed meminductor is well incorporated in this literature.

This research paper reports on a floating memristor model with minimum metal-oxide-semiconductor field-effect transistor count. The proposed structure uses only three nMOS transistors with a constant current bias and a single external capacitor. It offers less design complexity as compared to other existing memristor designs. The heart of the proposed design incorporates a MOS-based feedback circuit as an electronically controlled element for the memristance value. The memristor model has been integrated with 0.18-μm Taiwan Semiconductor Manufacturing Company Ltd. (TSMC) CMOS parameter. The pinched hysteresis loop of memristor for different frequency ranges and their composite characteristics are well analyzed using PSPICE simulation. The operating frequency range of the reported memristor is suitable up to few megahertz range. In addition to that application of the proposed MOS-memristor model is well described that comprises a Op-Amp-based Schmitt trigger circuit, a high-frequency modulation scheme, and an associative learning process. Finally, the postlayout simulation and experimental results are presented to validate the workability of the proposed memristor model.