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Robert Berks

dblp:96/4611 · DBLP profile ↗
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1ranked-venue papers
0as first author
0since 2021 · last 1999
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Applied, interdisciplinary, general and emerging computing · 1

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
1 paper
Integrated circuit design · 67% Embedded and real-time systems · 33%

Topics — the 3 heaviest of 3, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Integrated circuit design
asynchronous circuit design
0.011999
Response-time properties of linear asynchronous pipelines · Proc. IEEE 1999
Integrated circuit design › asynchronous circuit design
asynchronous pipeline
0.011999
Response-time properties of linear asynchronous pipelines · Proc. IEEE 1999
Embedded and real-time systems › real-time scheduling › schedulability analysis
response time analysis
0.011999
Response-time properties of linear asynchronous pipelines · Proc. IEEE 1999

Methods — techniques the papers use, named apart from their topics

variable-delay model · 0.0handshake protocol · 0.0
YearPublicationVenuePosition
1999 Response-time properties of linear asynchronous pipelines
abstract
One of the potential advantages of asynchronous circuits is that they can be optimized for average-case performance rather than worst-case performance. The performance analysis of asynchronous circuits, however, is more challenging than that of synchronous circuits because of the absence of a clock. We discuss some performance measures of special asynchronous networks, viz., response-time properties of asynchronous pipelines with various handshake communications. The response times of a pipeline are the delays between requests and succeeding acknowledgments for the first cell. We derive simple formulas for the bound on worst-case response time and average-case response time of such pipelines using a variable-delay model, where delays may vary between a lower and upper bound. The properties are independent of any particular implementation of the cells of the pipeline. The formulas give insight into the role of each parameter and allow a quick back-of-the-envelope prediction of the performance of an asynchronous pipeline.
Jo C. Ebergen, Robert Berks
Proc. IEEE2