Demo Data from VLDB 2026 / reviewers in the wild / expert
Dee A. B. Weikle
dblp:96/6187
· DBLP profile ↗
12ranked-venue papers
6as first author
2since 2021 · last 2025
0009-0006-6367-2770ORCID · verified
Domains — the database's venue-derived domains; a paper can count in several
Human-computer interaction and ubiquitous computing · 9 · 5 first-author · 2 since 2021Systems, architecture and hardware · 3 · 1 first-author
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Computer architecture, parallel and distributed computing, and storage systems
2 papers |
Processor architecture and microarchitecture · 64% Energy-efficient computing · 23% Memory systems · 13% |
Topics — the 7 heaviest of 8, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
Processor architecture and microarchitecture
instruction fetch |
0.1 | 1 | 2006 | Evaluating trace cache energy efficiency · ACM Trans. Archit. Code Optim. 2006 |
Energy-efficient computing › energy-efficient architecture
processor energy efficiency |
0.1 | 1 | 2006 | Evaluating trace cache energy efficiency · ACM Trans. Archit. Code Optim. 2006 |
Processor architecture and microarchitecture › instruction fetch
trace cache |
0.1 | 1 | 2006 | Evaluating trace cache energy efficiency · ACM Trans. Archit. Code Optim. 2006 |
Memory systems
DRAM |
0.0 | 1 | 2000 | Dynamic Access Ordering for Streamed Computations · IEEE Trans. Computers 2000 |
Processor architecture and microarchitecture › memory system microarchitecture
memory ordering |
0.0 | 1 | 2000 | Dynamic Access Ordering for Streamed Computations · IEEE Trans. Computers 2000 |
Processor architecture and microarchitecture
branch prediction |
0.0 | 1 | 2006 | Evaluating trace cache energy efficiency · ACM Trans. Archit. Code Optim. 2006 |
Memory systems › memory bandwidth
memory bandwidth optimization |
0.0 | 1 | 2000 | Dynamic Access Ordering for Streamed Computations · IEEE Trans. Computers 2000 |
Methods — techniques the papers use, named apart from their topics
cycle-accurate simulation · 0.1ED2 analysis · 0.1stream memory controller · 0.0hardware prefetching · 0.0compile-time stream detection · 0.0
| Year | Publication | Venue | Position |
|---|---|---|---|
| 2025 | Peer-led CS1 Review Sessions: Motivation, Sense of Belonging, and Learning Gains
Dee A. B. Weikle, Michael Stewart 0001, A. Carter Gilbert, Cory Longenecker |
SIGCSE (2) | 1 |
| 2022 | Designing TA Training Programs for Broadening ParticipationabstractTeaching Assistants (TAs) at universities are often an integral part of a department, heavily influencing the department culture. Our experience at James Madison University indicates the help provided by TAs on both course content and as a support network can have a significant positive impact on underrepresented students. In our efforts under the National Center for Women in Technology (NCWIT) Extension Services project, we expanded our teaching assistant program to include not only training as is considered best practice in the literature, but prioritization of diversity and inclusion concerns. In addition to sharing specific examples and resources from our current implementation, presenters will share experiences from their backgrounds at both small private liberal arts colleges to large research focused institutions. We will have focused small-group discussions about opportunities and challenges in implementing TA programs. Participants will be provided with a "Literature Practices Worksheet" based on a taxonomy of practices outlining decisions to be made while creating or modifying a program. They can then tailor their decisions to their institution. We will also provide resources from the community we use in our training along with examples of how we conduct these sessions. Participants will share their plans in fostering diversity and inclusion and have an opportunity to build a support network in making positive change in their institutions' TA programs. Dee A. B. Weikle, Michael Stewart 0001, Sharon Simmons |
SIGCSE (2) | 1 |
| 2020 | A Pilot Study on the Impact of Teaching Assistant Led CS1 Study Sessions using Peer Instruction: An Undergraduate Honors Capstone ProjectabstractThe aim of this research is to discover if a structured study session program for CS1 students led by Teaching Assistants using Peer Instruction can promote an environment in which students feel an increased sense of belonging and improve course material retention. This study investigates the efficacy of weekly study sessions by measuring student attitudes and content retention over the course of a single semester of the introductory CS1 course at a medium sized liberal arts university with approximately 8 sections of 30 students each. Megan Gilbert, Dee A. B. Weikle |
SIGCSE | 2 |
| 2019 | Automating Systems Course Unit and Integration Testing: Experience ReportabstractIntroducing software testing has taken on a greater importance in undergraduate computer science curricula in the last several years, with many departments using JUnit or other testing frameworks in the programming sequence and software engineering courses. We have developed an automated framework for unit and integration testing and grading for our intermediate-level systems course projects. Our system--designed to test C programs--combines the Check unit testing framework, custom Bash scripts for integration testing, and the Valgrind Memcheck memory leak detection tool. Although our courses use Linux, the framework is platform-independent and has been tested on a variety of other platforms. We have used this framework for seven semesters with four different instructors as part of the computer science program at a primarily undergraduate university with an emphasis on liberal arts. We distribute both public and private tests so that students get immediate feedback on their progress without knowing the actual contents of every test. We have observed that knowing their code is not completely working motivates more students to figure out what they don't understand before the project deadline. It also gives students examples of different levels of tests to use to debug their code, encourages them to develop a deeper understanding of the project specification, and reduces student anxiety about grades. Dee A. B. Weikle, Michael O. Lam, Michael S. Kirkpatrick |
SIGCSE | 1 |
| 2018 | Active Learning Strategies for Integrating the ACM Code of Ethics into CS Courses: (Abstract Only)abstractThe ACM Code of Ethics provides a framework for ethical conduct within the computing industry. The Code describes ethical conduct for individuals and organizations, as well as the basic moral principles underlying these prescriptions. Principles defined in the Code include: Avoid harm; be fair and take action not to discriminate; respect privacy; ensure the public good is the central concern during all professional computing work. While these principles are intuitive in many situations, students, faculty, and industry professionals often struggle to apply these concepts to computing. It is not obvious how to apply the concepts of harm, privacy, or the public good in courses on Operating Systems or Programming Languages, so discussion of the Code is often restricted to specialized Ethical Issues in Computing or Software Engineering courses. We believe this approach misses an educational opportunity to build on moral sensitivity--the ability to detect a potential moral problem within a particular context--as a foundation. Integrating the Code throughout the CS curriculum provides an opportunity to increase students' exposure to subtle moral dilemmas and improve their moral sensitivity. In this birds-of-a-feather (BoF) session, we will discuss: Which topics can be used to introduce ethical discussions into core Computer Science courses? How do you write and facilitate case study discussions? What other active learning techniques can be used to examine ethical issues? What concerns would faculty have in introducing ethical discussions into technical courses? What portions of the Code might be difficult for students and future practitioners to uphold? Michael S. Kirkpatrick, Dee A. B. Weikle |
SIGCSE | 2 |
| 2017 | Using the 5 Practices to Improve Facilitation of POGIL Activities (Abstract Only)abstractPOGIL (Process Oriented Guided Inquiry Learning) is a flipped classroom, problem-based learning technique for teaching students content through carefully designed questions that they work through in teams with well-defined roles. This technique enables students to retain content while also learning process skills such as communication and teamwork. Developing POGIL activities and facilitating them takes practice and experience. Few, if any, current faculty have been taught using POGIL activities and so have less experience to bring to their development and especially to their incorporation into the classroom. The skills and preparation for delivering an effective POGIL class are very different than faculty have seen in action. The 5 practices: Anticipating, Monitoring, Selecting, Sequencing, and Connecting can be used to better understand how to prepare for and facilitate POGIL activities. While the POGIL organization (pogil.org) has many training sessions, including facilitator training available, most computer science materials still do not incorporate facilitator information that goes beyond the answers to the questions and suggested timing for sections of activities. A brief example of an activity prepared using the 5 practices will be shared to illustrate the potential along with anecdotes and tips for transitioning from traditional lecture to POGIL activities in the classroom. Dee A. B. Weikle |
SIGCSE | 1 |
| 2015 | Juggling the Jigsaw: Enabling CS1 Growing Enrollment and Diversity at Undergraduate Institutions (Abstract Only)abstractThe enrollment in introductory computer science courses has been growing steadily for the last couple of years. Interest in the field is exploding across the nation. Colleges and universities of all shapes and sizes have seen enrollment in introductory computer science courses and to some extent in upper-division electives explode as well. Most R1 institutions handle such growth through the use of graduate TAs to teach CS1 courses. Many primarily undergraduate and/or liberal arts institutions don't have these resources, however. Complicating the scenario further, students coming to these non-research institutions expect personal interaction, are from a growingly diverse set of high-school graduates and seem to be less prepared for college than ever. Given the current funding climate for higher education, it is difficult to imagine how most universities and colleges will be able to negotiate this scenario. This BOF will provide a platform to discuss how to handle the growing, diverse, and uninitiated CS1 enrollment from many perspectives - individual, departmental, and institutional. What creative solutions can be brought to improve institutional motivation and how do we ensure that traditionally under-represented groups don't get left behind in the onslaught? Farzana Rahman, Dee A. B. Weikle |
SIGCSE | 2 |
| 2015 | A Peer Tutoring Model for Small Schools with Limited Funding and Resources (Abstract Only)abstractPeer tutoring has been used in a variety of contexts and a variety of institutions to both improve learning and retention for the classroom students and to improve the confidence and knowledge base of the peer tutor. Much of the current literature focusses on how to implement peer tutoring with a fairly large program, including at least one graduate TA and multiple undergraduates who have recently taken the course. In addition, these peers were trained outside of the normal classroom hours and/or paid to participate. While useful at larger institutions, or at least those with substantial resources, this model is generally unworkable at a smaller institution without funding to pay students, or a sufficient critical mass of students to enable formal training outside of the classroom. This lightning talk describes a slightly different model that involves the university's academic support center staff for tutoring training, class attendance for technical training, and the giving of credit as opposed to payment for the student. To receive more than one hour of credit the student also works closely with the professor to complete one or more "learning modules" that later become resources for the class and provide an additional learning opportunity for the tutor. This method has been used by the author with over 9 peer tutors across a range of 7 classes, with generally good success. Dee A. B. Weikle |
SIGCSE | 1 |
| 2013 | Nifty computing in society case studies (abstract only)abstractThis session is being organized by ACM SIGCAS (Computers and Society) for those with an interest in addressing the social and ethical consequences of computing in our society within their curricula. This year we will share case studies as a means to teaching a variety of issues resulting from the impact of computing in our society. Our discussion leaders will introduce briefly favorite case studies in their fields of interest and will encourage all participants to share examples of their own. Ways for dealing and solving current problems will be tackled. We will provide a plan of how to incorporate the case studies presented into our classes along with a handout of how to do so. Topics of interest include legal issues, social media, privacy, and sustainability. James K. Huggins, Alfreda Dudley, Karla Carter, Dee A. B. Weikle, Netiva Caftori |
SIGCSE | 4 |
| 2006 | Evaluating trace cache energy efficiencyabstractFuture fetch engines need to be energy efficient. Much research has focused on improving fetch bandwidth. In particular, previous research shows that storing concatenated basic blocks to form instruction traces can significantly improve fetch performance. This work evaluates whether this concatenating of basic blocks translates to significantenergy-efficiencygains. We compare processor performance and energy efficiency in trace caches compared to instruction caches. We find that, although trace caches modestly outperform instruction cache only alternatives, it is branch-prediction accuracy that really determines performance and energy efficiency. When access delay and area restrictions are considered, our results show that sequential trace caches achieve very similar performance and energy efficiency results compared to instruction cache-based fetch engines and show that the trace cache's failure to significantly outperform the instruction cache-based fetch organizations stems from the poorer implicit branch prediction from the next-trace predictor at smaller areas. Because access delay limits the theoretical performance of the evaluated fetch engines, we also propose a novel ahead-pipelined next-trace predictor. Our results show that an STC fetch organization with a three-stage, ahead-pipelined next-trace predictor can achieve 5--17% IPC and 29% ED2improvements over conventional, unpipelined organizations. Michele Co, Dee A. B. Weikle, Kevin Skadron |
ACM Trans. Archit. Code Optim. | 2 |
| 2000 | Dynamic Access Ordering for Streamed ComputationsabstractMemory bandwidth is rapidly becoming the limiting performance factor for many applications, particularly for streaming computations such as scientific vector processing or multimedia (de)compression. Although these computations lack the temporal locality of reference that makes traditional caching schemes effective, they have predictable access patterns. Since most modern DRAM components support modes that make it possible to perform some access sequences faster than others, the predictability of the stream accesses makes it possible to reorder them to get better memory performance. We describe a Stream Memory Controller (SMC) system that combines compile-time detection of streams with execution-time selection of the access order and issue. The SMC effectively prefetches read-streams, buffers write-streams, and reorders the accesses to exploit the existing memory bandwidth as much as possible. Unlike most other hardware prefetching or stream buffer designs, this system does not increase bandwidth requirements. The SMC is practical to implement, using existing compiler technology and requiring only a modest amount of special purpose hardware. We present simulation results for fast-page mode and Rambus DRAM memory systems and we describe a prototype system with which we have observed performance improvements for inner loops by factors of 13 over traditional access methods. Sally A. McKee, William A. Wulf, James H. Aylor, Robert H. Klenke, Maximo H. Salinas, Sung I. Hong, Dee A. B. Weikle |
IEEE Trans. Computers | 7 |
| 1998 | Caches as Filters: A New Approach to Cache AnalysisabstractAs the processor-memory performance gap continues to grow, so does the need for effective tools and metrics to guide the design of efficient memory hierarchies to bridge that gap. Aggregate statistics of cache performance can be useful for comparison, but they give us little insight into how to improve the design of a particular component. We propose a different approach to cache analysis-viewing caches as filters-and present two new metrics for analyzing cache behavior: instantaneous hit rate and instantaneous locality. We demonstrate how these measures can give us insight into the reference pattern of an executing program, and show an application of these measures in analyzing the effectiveness of the second level cache of a particular memory hierarchy. Dee A. B. Weikle, Sally A. McKee, William A. Wulf |
MASCOTS | 1 |