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David R. Tryon

dblp:96/651 · DBLP profile ↗
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2ranked-venue papers
1as first author
0since 2021 · last 1986
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 2 · 1 first-author

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
2 papers
Electronic design automation · 100%

Topics — the 5 heaviest of 5, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Electronic design automation › hardware verification and test › design for testability
built-in self-test
0.011986
Self-testing with correlated faults · DAC 1986
Electronic design automation › hardware verification and test
fault modeling
0.011986
Self-testing with correlated faults · DAC 1986
Electronic design automation
hardware verification and test
0.011986
Self-testing with correlated faults · DAC 1986
Electronic design automation › hardware verification and test › timing verification
statistical timing verification
0.011983
Statistical techniques of timing verification · DAC 1983
Electronic design automation › hardware verification and test
timing verification
0.011983
Statistical techniques of timing verification · DAC 1983

Methods — techniques the papers use, named apart from their topics

approximation algorithm · 0.0statistical analysis · 0.0
YearPublicationVenuePosition
1986 Self-testing with correlated faults
abstract
Accurate prediction of the number of self-test random patterns that will provide low defect levels is crucial. This prediction is complicated by fault-to-fault correlating effects. This paper presents a technique to assess the number of random patterns required to test to a given defect level in the presence of fault correlation. This paper will also develop approximation algorithms that enable test engineers to readily compute defect levels as a function of test coverage with correlated faults present. This paper thus enhances previous work which assumed fault-to-fault independence in determining random pattern sufficiency and defect levels.
David R. Tryon
DAC1
1983 Statistical techniques of timing verification
James H. Shelly, David R. Tryon
DAC2