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Gu Liu

dblp:96/7652 · DBLP profile ↗
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4ranked-venue papers
2as first author
1since 2021 · last 2025
—ORCID · conflict

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 2 · 1 first-authorApplied, interdisciplinary, general and emerging computing · 1 · 1 first-author · 1 since 2021

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Theoretical computer science
1 paper
Graph algorithms and graph theory · 100%
Computer architecture, parallel and distributed computing, and storage systems
1 paper
GPUs and heterogeneous computing · 81% Parallel and multicore computing · 19%

Topics — the 5 heaviest of 5, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
GPUs and heterogeneous computing
GPU graph processing
0.112012
FlexBFS: a parallelism-aware implementation of breadth-first search on GPU · PPoPP 2012
Graph algorithms and graph theory › graph traversal
breadth-first search
0.112012
FlexBFS: a parallelism-aware implementation of breadth-first search on GPU · PPoPP 2012
Graph algorithms and graph theory
graph traversal
0.112012
FlexBFS: a parallelism-aware implementation of breadth-first search on GPU · PPoPP 2012
GPUs and heterogeneous computing › GPU programming
dynamic parallelism
0.012012
FlexBFS: a parallelism-aware implementation of breadth-first search on GPU · PPoPP 2012
Parallel and multicore computing
parallel programming models
0.012012
FlexBFS: a parallelism-aware implementation of breadth-first search on GPU · PPoPP 2012

Methods — techniques the papers use, named apart from their topics

two-level queue management · 0.3kernel fusion · 0.3high-degree vertex specialization · 0.3
YearPublicationVenuePosition
2025 Port and radiation pattern decoupled metasurface-loaded patch antenna using deep-learning-assisted optimization for MIMO applications
abstract
A metasurface-loaded 1×2 patch array antenna assisted by a deep-learning optimization method is proposed to realize port and radiation pattern decoupling simultaneously to enhance the isolation among elements in multi-input multi-output (MIMO) systems. The deep-learning-assisted optimization method uses an artificial neural network (ANN) and a particle swarm optimization (PSO) algorithm to seek the optimal structure of the antenna to achieve port decoupling with undistorted radiation patterns. The ANN is trained to describe the nonlinear relationship between the geometric parameters and the responses of the antenna. The PSO algorithm, guided by the cost function and number of iterations, is used to optimize the structure of the antenna according to the cost function combined with the trained ANN. Finally, by constraining the cost function, we obtain a 1×2 patch array antenna with a metasurface fixed above by studs, which achieves port and radiation pattern decoupling simultaneously. To validate the principle and design method, we designed, fabricated, and measured an antenna prototype with dimensions of 0.88 λ 0 ×0.47 λ 0 ×0.21 λ 0 ( λ 0 is the wavelength in free space at the center frequency). The measured fractional bandwidth is 8% (4.8–5.2 GHz). The isolation of the two-element patch antenna increases from 7.6 dB to 24.3 dB with an envelope correlation coefficient (ECC) of <0.0005 at 0.35 λ 0 . Moreover, the H-plane radiation pattern of each element is consistent and symmetric in the broadside direction. These characteristics make the proposed antenna suitable for MIMO antenna systems with close spacing.
Gu Liu, Jiajiang Shen, Wenwen Yang 0001, Lei Guo 0012
Frontiers Inf. Technol. Electron. Eng.1
2012 FlexBFS: a parallelism-aware implementation of breadth-first search on GPU
abstract
In this paper, we present FlexBFS, a parallelism-aware implementation for breadth-first search on GPU. Our implementation can adjust the computation resources according to the feedback of available parallelism dynamically. We also optimized our program in three ways: (1)a simplified two-level queue management,(2)a combined kernel strategy and (3)a high-degree vertices specialization approach. Our experimental results show that it can achieve 3~20 times speedup against the fastest serial version, and can outperform the TBB based multi-threading CPU version and the previous most effective GPU version on all types of input graphs.
Gu Liu, Hong An, Wenting Han, Xuechao Wei, Xulong Tang
PPoPP1
2011 A Non-blocking Programming Framework for Pipeline Application on Multi-core Platform
abstract
Many applications meet certain programming patterns like pipeline, fork-join, do-all etc. While tools such as OS threads and OpenMP allow programmers only to express task or data parallelism, special support for programming patterns is distinctly lacking. Intel threading building blocks (TBB) is developed to address this problem, but its scheduler is general and not optimized for any of its parallel algorithms which include pipeline specially. In this paper, we provide a non-blocking framework for pipeline application on multi-core platform. We target linear pipeline in which each filter has one entrance and one exit. We design a novel work-stealing scheduler optimized specially for pipeline application: first, priority based stealing, priority is calculated for each filter in pipeline so that a worker can find the optimal "victim" easily when it needs to steal, second, multiple tasks can be stolen at a time so that much stealing time is reduced. A non-block queue is used to store intermediate result to reduce lock overhead and increase scalability. We apply our framework to four case studies, including text filter, two fish, ferret, ded up. And our framework reduces execution time of TBB by 72% in best case and 20% on average on an 8 core machine.
Hong An, Gu Liu, Wenting Han, Mu Xu, Qi Li 0034
ISPA3
2009 The Mapping Framework and Optimizing Strategy for Block Cryptography Algorithms on Cell Broadband Engine
abstract
The Cell Broadband Engine is a typical heterogeneous chip multiprocessor which provides potential high performance for computing-intensive applications. Our researches focus on how to use Cell to speed up block cryptography applications. In this paper, we propose a mapping framework for block cryptography working in ECB mode and corresponding optimizing strategy. We take four algorithms(RC5, 3DES, AES, and Twofish) as benchmark and implement these four algorithms using Cell programming language. In order to enhance the performance, we present an optimizing strategy and evaluate the effects of the optimizing methods including compiler optimization, dual buffering, vectorization, and loop unrolling. The experiments indicate that all these four algorithms can obtain 5-20 times speedup compared with traditional processors, which shows that our mapping framework and optimizing strategy are effective for the block cryptography algorithms.
Mu Xu, Hong An, Gu Liu, Yaobin Wang, Ping Yao, Xiurui Hao, Wenting Han
PDCAT3