VLDB 2026 Research / reviewers in the wild / expert
Ebru Aydin Gol
dblp:98/11143 · also Ebru Aydin Göl
· DBLP profile ↗
10ranked-venue papers
3as first author
5since 2021 · last 2025
0000-0002-5813-9836ORCID · verified
Domains — the database's venue-derived domains; a paper can count in several
Theory of computation · 6 · 2 first-author · 3 since 2021Software engineering, systems software and programming languages · 3 · 1 first-author · 1 since 2021Artificial intelligence and machine learning · 1 · 1 since 2021Systems, architecture and hardware · 1Applied, interdisciplinary, general and emerging computing · 1 · 1 first-author
| Year | Publication | Venue | Position |
|---|---|---|---|
| 2025 | Interchangeable Token Embeddings for Extendable Vocabulary and Alpha-EquivalenceabstractLanguage models lack the notion of interchangeable tokens: symbols that are semantically equivalent yet distinct, such as bound variables in formal logic. This limitation prevents generalization to larger vocabularies and hinders the model's ability to recognize alpha-equivalence, where renaming bound variables preserves meaning. We formalize this machine learning problem and introduce alpha-covariance, a metric for evaluating robustness to such transformations. To tackle this task, we propose a dual-part token embedding strategy: a shared component ensures semantic consistency, while a randomized component maintains token distinguishability. Compared to a baseline that relies on alpha-renaming for data augmentation, our approach demonstrates improved generalization to unseen tokens in linear temporal logic solving, propositional logic assignment prediction, and copying with an extendable vocabulary, while introducing a favorable inductive bias for alpha-equivalence. Our findings establish a foundation for designing language models that can learn interchangeable token representations, a crucial step toward more flexible and systematic reasoning in formal domains. Our code and project page are available at https://necrashter.github.io/interchangeable-token-embeddings Ilker Isik, Ramazan Gokberk Cinbis, Ebru Aydin Gol |
ICML | 3 |
| 2024 | Cycle encoding-based parameter synthesis for timed automata safety
Burkay Sucu, Ebru Aydin Gol |
Acta Informatica | 2 |
| 2022 | An automated system repair framework with signal temporal logicabstractAbstract We present an automated system repair framework for cyber-physical systems. The proposed framework consists of three main steps: (1) system simulation and fault detection to generate a labeled dataset, (2) identification of the repairable temporal properties leading to the faulty behavior and (3) repairing the system to avoid the occurrence of the cause identified in the second step. We express the cause as a past time signal temporal logic (ptSTL) formula and present an efficient monotonicity-based method to synthesize a ptSTL formula from a labeled dataset. Then, in the third step, we modify the faulty system by removing all behaviors that satisfy the ptSTL formula representing the cause of the fault. We apply the framework to two rich modeling formalisms: discrete-time dynamical systems and timed automata. For both of them, we define repairable formulae, the corresponding repair procedures, and illustrate them over case studies. Mert Ergürtuna, Beyazit Yalcinkaya, Ebru Aydin Gol |
Acta Informatica | 3 |
| 2022 | Timed Automata Robustness Analysis via Model CheckingabstractTimed automata (TA) have been widely adopted as a suitable formalism to model time-critical systems. Furthermore, contemporary model-checking tools allow the designer to check whether a TA complies with a system specification. However, the exact timing constants are often uncertain during the design phase. Consequently, the designer is often able to build a TA with a correct structure, however, the timing constants need to be tuned to satisfy the specification. Moreover, even if the TA initially satisfies the specification, it can be the case that just a slight perturbation during the implementation causes a violation of the specification. Unfortunately, model-checking tools are usually not able to provide any reasonable guidance on how to fix the model in such situations. In this paper, we propose several concepts and techniques to cope with the above mentioned design phase issues when dealing with reachability and safety specifications. Jaroslav Bendík, Ahmet Sencan, Ebru Aydin Gol, Ivana Cerná |
Log. Methods Comput. Sci. | 3 |
| 2021 | Timed Automata Relaxation for ReachabilityabstractAbstract Timed automata (TA) have shown to be a suitable formalism for modeling real-time systems. Moreover, modern model-checking tools allow a designer to check whether a TA complies with the system specification. However, the exact timing constraints of the system are often uncertain during the design phase. Consequently, the designer is able to build a TA with a correct structure, however, the timing constraints need to be tuned to make the TA comply with the specification. In this work, we assume that we are given a TA together with an existential property, such as reachability, that is not satisfied by the TA. We propose a novel concept of a minimal sufficient reduction (MSR) that allows us to identify the minimal setSof timing constraints of the TA that needs to be tuned to meet the specification. Moreover, we employ mixed-integer linear programming to actually find a tuning ofSthat leads to meeting the specification. Jaroslav Bendík, Ahmet Sencan, Ebru Aydin Gol, Ivana Cerná |
TACAS (1) | 3 |
| 2018 | Efficient Online Monitoring and Formula Synthesis with Past STLabstractIn online monitoring, it is crucial to detect a deviation from normal behavior as soon as it occurs. During online monitoring, the system traces are checked against monitoring rules in real-time to detect such deviations. In general, the rules are defined as boundary conditions by the experts of the monitored system. In this work, we study the problem of synthesizing online monitoring rules in the form of temporal logic formulas in an automated way. We describe the monitoring rules as past time signal temporal logic (ptSTL) formulas and propose an algorithm to synthesize such formulas from a given set of labeled system traces. The algorithm searches the formula space for a predefined number of operators in an efficient way and produce the best formula representing a monitoring rule. In addition, we improve online STL monitoring algorithm to efficiently compute a quantitative valuation for piecewise-constant signals from ptSTL formulas, thus, reduce the overhead of the the real-time computation. Ebru Aydin Gol |
CoDIT | 1 |
| 2014 | Temporal logic inference for classification and prediction from dataabstractThis paper presents an inference algorithm that can discover temporal logic properties of a system from data. Our algorithm operates on finite time system trajectories that are labeled according to whether or not they demonstrate some desirable system properties (e.g. "the car successfully stops before hitting an obstruction"). A temporal logic formula that can discriminate between the desirable behaviors and the undesirable ones is constructed. The formulae also indicate possible causes for each set of behaviors (e.g. "If the speed of the car is greater than 15 m/s within 0.5s of brake application, the obstruction will be struck") which can be used to tune designs or to perform on-line monitoring to ensure the desired behavior. We introduce reactive parameter signal temporal logic (rPSTL), a fragment of parameter signal temporal logic (PSTL) that is expressive enough to capture causal, spatial, and temporal relationships in data. We define a partial order over the set of rPSTL formulae that is based on language inclusion. This order enables a directed search over this set, i.e. given a candidate rPSTL formula that does not adequately match the observed data, we can automatically construct a formula that will fit the data at least as well. Two case studies, one involving a cattle herding scenario and one involving a stochastic hybrid gene circuit model, are presented to illustrate our approach. Zhaodan Kong, Austin Jones, Ana I. Medina Ayala, Ebru Aydin Gol, Calin Belta |
HSCC | 4 |
| 2013 | Temporal logic model predictive control for discrete-time systemsabstractThis paper proposes an optimal control strategy for a discrete-time linear system constrained to satisfy a temporal logic specification over a set of linear predicates in its state variables. The cost is a quadratic function that penalizes the distance from desired state and control trajectories. The specification is a formula of syntactically co-safe Linear Temporal Logic (scLTL), which can be satisfied in finite time. It is assumed that the reference trajectories are only available over a finite horizon and a model predictive control (MPC) approach is employed. The MPC controller solves a set of convex optimization problems guided by the specification and subject to progress constraints. The constraints ensure that progress is made towards the satisfaction of the formula with guaranteed satisfaction by the closed-loop trajectory. The algorithms proposed in this paper were implemented as a software package that is available for download. Illustrative case studies are included. Ebru Aydin Gol, Mircea Lazar |
HSCC | 1 |
| 2012 | Experimentally driven verification of synthetic biological circuitsabstractWe present a framework that allows us to construct and formally analyze the behavior of synthetic gene circuits from specifications in a high level language used in describing electronic circuits. Our back-end synthesis tool automatically generates genetic-regulatory network (GRN) topology realizing the specifications with assigned biological “parts” from a database. We describe experimental procedures to acquire characterization data for the assigned parts and construct mathematical models capturing all possible behaviors of the generated GRN. We delineate algorithms to create finite abstractions of these models, and novel analysis techniques inspired from model-checking to verify behavioral specifications using Linear Temporal Logic (LTL) formulae. Boyan Yordanov, Evan Appleton, Rishi Ganguly, Ebru Aydin Gol, Swati Banerjee Carr, Swapnil Bhatia, Traci Haddock, Calin Belta, Douglas Densmore |
DATE | 4 |
| 2012 | Language-guided controller synthesis for discrete-time linear systemsabstractThis paper considers the problem of controlling discrete-time linear systems from specifications given as formulas of syntactically co-safe linear temporal logic over linear predicates in the state variables of the system. A systematic procedure is developed for the automatic computation of sets of initial states and feedback controllers such that all the resulting trajectories of the corresponding closed-loop system satisfy the given specifications. The procedure is based on the iterative construction and refinement of an automaton that enforces the satisfaction of the formula. Interpolation and polyhedral Lyapunov function based approaches are proposed to compute the polytope-to-polytope controllers that label the transitions of the automaton. The algorithms developed in this paper were implemented as a software package that is available for download. Their application and effectiveness are demonstrated for two challenging case studies. Ebru Aydin Gol, Mircea Lazar, Calin Belta |
HSCC | 1 |