Demo Data from VLDB 2026 / reviewers in the wild / expert
Benjamin J. Welch
dblp:98/2410
· DBLP profile ↗
2ranked-venue papers
2as first author
0since 2021 · last 2005
—ORCID · none
Domains — the database's venue-derived domains; a paper can count in several
Systems, architecture and hardware · 2 · 2 first-author
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Computer architecture, parallel and distributed computing, and storage systems
1 paper |
Embedded and real-time systems · 100% | |
| Software engineering, system software, and programming languages
1 paper |
Compilers and program optimization · 100% |
Topics — the 3 heaviest of 5, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
Embedded and real-time systems › real-time embedded systems
hard real-time systems |
0.1 | 1 | 2005 | Supporting Demanding Hard-Real-Time Systems with STI · IEEE Trans. Computers 2005 |
Embedded and real-time systems
real-time scheduling |
0.1 | 1 | 2005 | Supporting Demanding Hard-Real-Time Systems with STI · IEEE Trans. Computers 2005 |
Embedded and real-time systems › embedded hardware platform
microcontroller-based embedded systems |
0.0 | 1 | 2005 | Supporting Demanding Hard-Real-Time Systems with STI · IEEE Trans. Computers 2005 |
Methods — techniques the papers use, named apart from their topics
polling servers · 0.1compilation · 0.1
| Year | Publication | Venue | Position |
|---|---|---|---|
| 2005 | Supporting Demanding Hard-Real-Time Systems with STIabstractSoftware thread integration (STI) is a compilation technique which enables the efficient use of an application's fine-grain idle time on generic processors without special hardware support. With STI, a primary function is automatically interleaved with a secondary function to create a single implicitly multithreaded function which minimizes context switching and, hence, both improves performance and also offers very fine-grain concurrency. In this work, we extend STI techniques to address two challenges. First, we reduce response time for interrupts or other high-priority threads by introducing polling servers into integrated threads. Second, we enable integration with long host threads, expanding the domain of STI. We derive methods to evaluate the response time for threads in systems with and without these new integration methods. We demonstrate these concepts with the integration of various threads in a sample hard-real-time system on a highly-constrained microcontroller. We use an inexpensive 20 MHz AVR 8-bit microcontroller to generate monochrome NTSC video while servicing a high-speed (115,2 kbaud) serial communication link. We have built and tested this system, achieving graphics rendering speed-ups of 3.99/spl times/ to 13.5/spl times/. Benjamin J. Welch, Shobhit O. Kanaujia, Adarsh Seetharam, Deepaksrivats Thirumalai, Alexander G. Dean |
IEEE Trans. Computers | 1 |
| 2003 | Extending STI for demanding hard-real-time systemsabstractSoftware thread integration (STI) is a compilation technique which enables the efficient use of an application's fine-grain idle time on generic processors without special hardware support. With STI, a primary function (with real-time requirements on specific instructions) is automatically interleaved with a secondary function to create a single implicitly multithreaded function which minimizes context switching and hence both improves performance and also offers very fine-grain concurrency.In this paper we extend STI techniques to address two challenges. First, we reduce response time for interrupts or other high-priority threads by introducing polling servers into integrated threads. Currently integrated threads disable interrupts, delaying all other work until their completion. Second, we enable integration with long host threads, expanding the domain of STI. With current techniques, if there are frequent interrupts, only host threads which can finish execution before the next interrupt can be integrated. We derive methods to evaluate the response time for threads in systems with and without these new integration methods.We demonstrate these concepts with the integration of various threads in a sample hard-real-time system on a highly-constrained microcontroller. We use an inexpensive 20 MHz AVR 8-bit microcontroller to generate monochrome NTSC video while servicing a high-speed (115.2 kbaud) serial communication link. We have built and tested this system and demonstrate graphics rendering speed-ups of 3.99x to 13.5x. Benjamin J. Welch, Shobhit O. Kanaujia, Adarsh Seetharam, Deepaksrivats Thirumalai, Alexander G. Dean |
CASES | 1 |