A novel model order reduction (MOR) method, SparseRC, for multiterminal RC circuits is proposed. Specifically tailored to systems with many terminals, SparseRC employs graph-partitioning and fill-in reducing orderings to improve sparsity during model reduction, while maintaining accuracy via moment matching. The reduced models are easily converted to their circuit representation. These contain much fewer nodes and circuit elements than otherwise obtained with conventional MOR techniques, allowing faster simulations at little accuracy loss.

Large resistor networks arise during the design of very-large-scale integration chips as a result of parasitic extraction and electro static discharge analysis. Simulating these large parasitic resistor networks is of vital importance, since it gives an insight into the functional and physical performance of the chip. However, due to the increasing amount of interconnect and metal layers, these networks may contain millions of resistors and nodes, making accurate simulation time consuming or even infeasible. We propose efficient algorithms for three types of analysis of large resistor networks: 1) computation of path resistances; 2) computation of resistor currents; and 3) reduction of resistor networks. The algorithms are exact, orders of magnitude faster than conventional approaches, and enable simulation of very large networks.

Design of integrated RF circuits requires detailed insight in the behavior of the used components. Unintended coupling and perturbation effects need to be accounted for before production, but full simulation of these effects can be expensive or infeasible. In this paper, we present a method to build nonlinear phase macromodels of voltage-controlled oscillators. These models can be used to accurately predict the behavior of individual and mutually coupled oscillators under perturbation at a lower cost than full circuit simulations. The approach is illustrated by numerical experiments with realistic designs.

In this paper, the dominant spectral-zero method (dominant SZM) is presented, a new passivity-preserving model-reduction method for circuit simulation. Passivity is guaranteed via spectral-zero interpolation, and a dominance criterion is proposed for selecting spectral zeros. Dominant SZM is implemented as an iterative eigenvalue-approximation problem using the subspace-accelerated dominant-pole algorithm. Passive circuits are reduced automatically irrespective of how the original system equations are formulated (e.g., circuit models containing controlled sources or susceptance elements). Dominant SZM gives comparable and often more accurate reduced models than known techniques such as PRIMA, modal approximation, or positive real balanced truncation.