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Z. Chuang-qi

dblp:99/1607 · DBLP profile ↗
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1ranked-venue papers
1as first author
0since 2021 · last 1981
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 1 · 1 first-authorSoftware engineering, systems software and programming languages · 1 · 1 first-author

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
1 paper
Interconnection networks and networks-on-chip · 100%

Topics — the 1 heaviest of 2, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Interconnection networks and networks-on-chip › multiprocessor interconnection
processor-memory interconnection		 0.011981
Alignment Network Used for Connecting a Prime Number of Memory Blocks with a Power of 2 of Processing Elements · ISCA 1981
YearPublicationVenuePosition
1981 Alignment Network Used for Connecting a Prime Number of Memory Blocks with a Power of 2 of Processing Elements
Z. Chuang-qi, S. Ren-Ben
 ISCA1