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Marcos Hervé

dblp:99/5691 · also Marcos Barcellos Hervé · DBLP profile ↗
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5ranked-venue papers
2as first author
0since 2021 · last 2011
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 5 · 2 first-authorSoftware engineering, systems software and programming languages · 1

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
1 paper
Electronic design automation · 100%

Topics — the 3 heaviest of 3, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Electronic design automation › hardware verification and test
fault coverage
0.112008
A High-Fault-Coverage Approach for the Test of Data, Control and Handshake Interconnects in Mesh Networks-on-Chip · IEEE Trans. Computers 2008
Electronic design automation
hardware verification and test
0.112008
A High-Fault-Coverage Approach for the Test of Data, Control and Handshake Interconnects in Mesh Networks-on-Chip · IEEE Trans. Computers 2008
Electronic design automation › hardware verification and test › VLSI testing
interconnect testing
0.112008
A High-Fault-Coverage Approach for the Test of Data, Control and Handshake Interconnects in Mesh Networks-on-Chip · IEEE Trans. Computers 2008

Methods — techniques the papers use, named apart from their topics

XY routing · 0.1
YearPublicationVenuePosition
2011 Functional Test of Mesh-Based NoCs with Deterministic Routing: Integrating the Test of Interconnects and Routers
Marcos Hervé, Marcelo de Souza Moraes, Marcelo Lubaszewski, Fernanda Lima Kastensmidt, Érika F. Cota
J. Electron. Test.1
2011 Improving the yield of NoC-based systems through fault diagnosis and adaptive routing
Caroline Concatto, Guilherme Fachini, Marcos Hervé, Fernanda Lima Kastensmidt, Érika F. Cota, Marcelo Lubaszewski
J. Parallel Distributed Comput.4
2009 Improving yield of torus nocs through fault-diagnosis-and-repair of interconnect faults
abstract
We propose a fault tolerance method for torus NoCs capable of increase the yield with minimal performance overhead. The proposed approach consists in detecting and diagnosing interconnect faults using BIST structures and activating alternative paths for the faulty links. Experimental results show that alternative fault-free paths are found by the dynamic routing for 95% of the diagnosed faults (stuck-at and pairwise shorts within a single link or between any two links).
Caroline Concatto, Fernanda Lima Kastensmidt, Érika F. Cota, Marcelo Lubaszewski, Marcos Hervé
IOLTS6
2009 Diagnosis of interconnect shorts in mesh NoCs
abstract
We propose a method to diagnose interconnect short-circuit faults in mesh 7oCs. The fault model comprises all shorts between any two wires of a defined 7oC neighborhood. Test sequences are applied in 7oC functional mode. Experimental results show that 93% of the interconnect shorts can be diagnosed.
Marcos Hervé, Érika F. Cota, Fernanda Lima Kastensmidt, Marcelo Lubaszewski
NOCS1
2008 A High-Fault-Coverage Approach for the Test of Data, Control and Handshake Interconnects in Mesh Networks-on-Chip
abstract
A novel strategy to detect interconnect faults between distinct channels in networks-on-chip is proposed. Short faults between distinct channels in the data, control and communication handshake lines are considered in a cost-effective test sequence for Mesh NoC topologies based on XY routing.
Érika F. Cota, Fernanda Lima Kastensmidt, Maico Cassel, Marcos Hervé, Paulo Meirelles, Alexandre M. Amory, Marcelo Lubaszewski
IEEE Trans. Computers4