The analysis of complex building time-series for actionable insights and recommendations remains challenging due to the nonlinear and multi-scale characteristics of energy data. To address this, we propose a framework that fine-tunes visual language large models (VLLMs) on 3D graphical representations of the data. The approach converts 1D time-series into 3D representations using continuous wavelet transforms (CWTs) and recurrence plots (RPs), which capture temporal dynamics and localize frequency anomalies. These 3D encodings enable VLLMs to visually interpret energy-consumption patterns, detect anomalies, and provide recommendations for energy efficiency. We demonstrate the framework on real-world building-energy datasets, where fine-tuned VLLMs successfully monitor building states, identify recurring anomalies, and generate optimization recommendations. Quantitatively, the Idefics-7B VLLM achieves validation losses of 0.0952 with CWTs and 0.1064 with RPs on the University of Sharjah energy dataset, outperforming direct fine-tuning on raw time-series data (0.1176) for anomaly detection. This work bridges time-series analysis and visualization, providing a scalable and interpretable framework for energy analytics.

This study presents an Adaptive Transfer Learning and Thresholding-based Deep Learning Model (ATL-TDLM) for automated breathing pattern recognition using thermal imaging. Unlike conventional methods that rely on sound-based respiratory data, our approach leverages hierarchical deep feature extraction and adaptive multi-thresholding (AMT) to enhance feature segmentation. The model integrates knowledge distillation-based fine-tuning (KD-FT) to optimize learning transfer and contrastive representation learning (CRL) to improve inter-class separability between inhalation (INH) and exhalation (EXH) phases. The ATL-TDLM framework achieves an accuracy of 98.8%, significantly outperforming state-of-the-art models while ensuring computational efficiency. This approach has potential applications in respiratory disorder detection, including sleep apnea and asthma monitoring.

Large Language Models (LLMs) have been utilized extensively for cancer detection and diagnosis, benefiting from the vast textual data available in the medical field. However, these models often lack specific training on cancer-related data, which can limit their effectiveness in specialized medical contexts. Traditional methods typically deploy LLMs directly for diagnosis without incorporating domain-specific expertise, potentially compromising outcome reliability. This paper presents a comparative study focusing on the application of Low-Rank Adaptation (LoRA) to fine-tune LLMs for cancer-related tasks. LoRA modifies the self-attention and feed-forward layers of transformer architectures with low-rank matrices, allowing for specialized adaptation with fewer parameters. A general LLM was fine-tuned using LoRA on a dataset derived from four annotated books on breast cancer. The performance of this LoRA-enhanced model was compared against several baseline LLMs fine-tuned through traditional methods. It was found that the LoRA-fine-tuned Biomstral-7B demonstrated the best training loss of 0.91025 and validation loss of 0.912722 scores, indicating enhanced integration of domain-specific knowledge. The potential of adaptive fine-tuning techniques like LoRA in specialized applications is highlighted, suggesting further exploration into their effectiveness across various complex domains requiring expert knowledge. Further research is encouraged to assess such approaches’ broader applicability and impact in diverse AI applications.

Malicious Software (Malware) is a primary element of many cyber crimes and attacks, causing massive damage and financial losses to organizations. Accordingly, malware detection and classification has become a crucial security field resulting in various attempts from researchers to develop solutions including signature-based approaches to Artificial Intelligence (AI) models showing their efficacy in detecting malware. Yet, users still have reservations about AI models due to the ambiguity and mysteriousness of their decisions resulting from their black-box nature. To address this problem, this paper proposes to develop explainable AI models to classify the malware families robustly. The proposed method uses text classification of API call sequences generated by these families by considering two datasets. A weighted training methodology is used to solve the dataset imbalance problem. Subsequently, the method presents an eXplainable AI (XAI) approach to establish an understandable and interpretable relationship between the API call sequences and the Bidirectional Encoder Representations from Transformers (BERT) model decisions, which enhance the model accountability and usability by employing the Local Interpretable Model-Agnostic Explanation (LIME) and the Shapley Additive Explanations (SHAP) platforms. The results reveal that the BERT model outperforms its counterparts considering F1 score, Balanced Accuracy (BA), and Matthews correlation coefficient (MCC).

Tomato plant disease detection and classification, utilizing leaf images through deep learning, intersects the fields of plant pathology and agriculture. Deep learning has demonstrated significant potential in accurately identifying and classifying various plant diseases from leaf images. In this study, we introduce a hybrid system that combines a potent machine learning algorithm, Exponential Discriminant Analysis (EDA), with a transfer learning process leveraging recent and advanced deep networks, including ResNet50, Darknet53, DenseNet201, and EfficientNetB0. This system was evaluated using two challenging datasets: Taiwan and PlantVillage tomato leaf datasets. The experimental results underscore the high competitiveness of the proposed method, achieving mean accuracies of 98.29% and $\mathbf{9 8. 0 9 \%}$ on these datasets, respectively.

Tracheal intubation is a critical medical procedure involving the insertion of a tube into the trachea to maintain an open airway. While essential, this procedure carries significant risks, such as incorrect tube placement. Advances in visually guided intubation methods, like video laryngoscopy, have enhanced safety by enabling precise tracheal segmentation from endoscopic images. Our study introduces an innovative image enhancement technique for video endoscopy that significantly improves tracheal visibility and segmentation accuracy. This novel approach not only facilitates safer and more accurate intubation but also minimizes patient discomfort and procedural risks. Tested against the UoS Dataset and real patient data from thyroidectomy procedures, our method demonstrated superior performance, achieving a segmentation accuracy of $97 \%$, a precision of $94 \%$, and a recall of $99 \%$. Our tailored method is computationally efficient, making it suitable for implementation on edge devices like Arduino, thereby enhancing intubation safety and efficiency in various medical settings.

Summary Stereo vision is a major computer vision technique commonly used for robotics applications. Existing software implementations of this technique on general‐purpose processors offer low time‐to‐market compared to other platforms. However, such implementations can hardly achieve real‐time and their cost is usually relatively high. These issues can be solved by embedded multicore platforms. In this article, we present a low‐cost, improved software implementation of a stereo matching algorithm in the correlation stage that combines a sparse rank transform with a combination of sum of absolute differences 1‐D and 2‐D box filtering algorithms. A circular buffer scheme is used to optimize memory usage during the rank computation stage. The system runs on a heterogeneous multicore platform (ODROID XU4). Through the extensive use of single instruction multiple data Neon intrinsics, the system can process images with a size of pixels and a disparity range of 20 pixels at a rate of 111 frames per second. The proposed system can be used in mobile robot platforms that require low power consumption while delivering real‐time performance.

The industrial revolution has elevated science and engineering to foster the development of Image Processing and Artificial Intelligence (AI) and put the visualization of information on an even higher pedestal. Yet, the demands of the industrial age have contributed to an ever-growing wildfire of climate change, sparking a revolution in energy efficiency research. With the aim to advance energy efficiency research from an AI standpoint, a novel transformation of raw-formatted data repositories, known as data lakes, into multi-dimensional visualizations data coupled with computationally lightweight, edge-based AI implementations are proposed as means to understand the energy consumption patterns in buildings. As a novel method of understanding energy data visually, current results comprise a Multi-Dimensional Gramian Angular Field (GAF) representation of energy data as both 2D and 3D interactive forms. Moreover, a case study on deep learning classification employed on ODROID-XU4 yields ~90% accuracy and a classification rate of 17.5 msec/image.

Smart nonintrusive load monitoring (NILM) represents a cost-efficient technology for observing power usage in buildings. It tackles several challenges in transitioning into a more effective, sustainable, and digital energy efficiency environment. This paper presents a comprehensive review of recent trends in the NILM field, in which we propose a multiperspective classification of existing smart NILM techniques. More attention is devoted to describing the contributions of deep learning, feature extraction, computing platforms, and application scenarios for NILM development. Accordingly, NILM technical aspects are first investigated, including data collection devices and public data sets. Next, event-based and non-event-based NILM algorithms are overviewed. Furthermore, potential limitations of existing solutions are identified, highlighting their technical challenges, especially those related to security and privacy preservation, data scarcity, results reproduction, and implementation and business difficulties. Lastly, future directions are explored to overcome the identified limitations.

Nonintrusive load monitoring (NILM) is the de facto technique for extracting device-level power consumption fingerprints at (almost) no cost from only aggregated mains readings. Specifically, there is no need to install an individual meter for each appliance. However, a robust NILM system should incorporate a precise appliance identification module that can effectively discriminate between various devices. In this context, this paper proposes a powerful method to extract accurate power fingerprints for electrical appliance identification. Rather than relying solely on time-domain (TD) analysis, this framework abstracts the phase encoding of the TD description of power signals using a two-dimensional (2D) representation. This allows mapping power trajectories to a novel 2D binary representation space, and then performing a histogramming process after converting binary codes to new decimal representations. This yields the final histogram of 2D phase encoding of power signals, namely, 2D-PEP. An empirical performance evaluation conducted with three realistic power consumption databases collected at distinct resolutions indicates that the proposed 2D-PEP descriptor achieves outperformance for appliance identification in comparison with other recent techniques. Accordingly, high identification accuracies are attained on the GREEND, UK-DALE, and WHITED data sets, where 99.54%, 98.78%, and 100% rates have been achieved, respectively, using the proposed 2D-PEP descriptor.

Anomaly detection in energy consumption is a crucial step towards developing efficient energy saving systems, diminishing overall energy expenditure and reducing carbon emissions. Therefore, implementing powerful techniques to identify anomalous consumption in buildings and providing this information to end-users and managers is of significant importance. Accordingly, two novel schemes are proposed in this paper; the first one is an unsupervised abnormality detection based on one-class support vector machine, namely UAD-OCSVM, in which abnormalities are extracted without the need of annotated data; the second is a supervised abnormality detection based on micromoments (SAD-M2), which is implemented in the following steps: (i) normal and abnormal power consumptions are defined and assigned; (ii) a rule-based algorithm is introduced to extract the micromoments representing the intent-rich moments, in which the end-users make decisions to consume energy; and (iii) an improved K-nearest neighbors model is introduced to automatically classify consumption footprints as normal or abnormal. Empirical evaluation conducted in this framework under three different data sets demonstrates that SAD-M2 achieves both a highest abnormality detection performance and real-time processing capability with considerably lower computational cost in comparison with other machine learning methods. For instance, up to 99.71% accuracy and 99.77% F1 score have been achieved using a real-world data set collected at the Qatar University energy lab.

The recent advances in artificial intelligence namely in machine learning and deep learning, have boosted the performance of intelligent systems in several ways. This gave rise to human expectations, but also created the need for a deeper understanding of how intelligent systems think and decide. The concept of explainability appeared, in the extent of explaining the internal system mechanics in human terms. Recommendation systems are intelligent systems that support human decision making, and as such, they have to be explainable to increase user trust and improve the acceptance of recommendations. In this study, we focus on a context-aware recommendation system for energy efficiency and develop a mechanism for explainable and persuasive recommendations, which are personalized to user preferences and habits. The persuasive facts either emphasize on the economical saving prospects (Econ) or on a positive ecological impact (Eco) and explanations provide the reason for recommending an energy saving action. Based on a study conducted using a Telegram bot, different scenarios have been validated with actual data and human feedback. Current results show a total increase of 19% on the recommendation acceptance ratio when both economical and ecological persuasive facts are employed. This revolutionary approach on recommendation systems, demonstrates how intelligent recommendations can effectively encourage energy saving behavior.

Identifying domestic appliances in the smart grid leads to a better power usage management and further helps in detecting appliance-level abnormalities. An efficient identification can be achieved only if a robust feature extraction scheme is developed with a high ability to discriminate between different appliances on the smart grid. Accordingly, we propose in this paper a novel method to extract electrical power signatures after transforming the power signal to 2D space, which has more encoding possibilities. Following, an improved local binary patterns (LBP) is proposed that relies on improving the discriminative ability of conventional LBP using a post-processing stage. A binarized eigenvalue map (BEVM) is extracted from the 2D power matrix and then used to post-process the generated LBP representation. Next, two histograms are constructed, namely up and down histograms, and are then concatenated to form the global histogram. A comprehensive performance evaluation is performed on two different datasets, namely the GREEND and WITHED, in which power data were collected at 1 Hz and 44000 Hz sampling rates, respectively. The obtained results revealed the superiority of the proposed LBP-BEVM based system in terms of the identification performance versus other 2D descriptors and existing identification frameworks.

Consciousness about power consumption at the appliance level can assist user in promoting energy efficiency in households. In this paper, a superior non-intrusive appliance recognition method that can provide particular consumption footprints of each appliance is proposed. Electrical devices are well recognized by the combination of different descriptors via the following steps: (a) investigating the applicability along with performance comparability of several time-domain (TD) feature extraction schemes; (b) exploring their complementary features; and (c) making use of a new design of the ensemble bagging tree (EBT) classifier. Consequently, a powerful feature extraction technique based on the fusion of TD features is proposed, namely fTDF, aimed at improving the feature discrimination ability and optimizing the recognition task. An extensive experimental performance assessment is performed on two different datasets called the GREEND and WITHED, where power consumption signatures were gathered at 1 Hz and 44000 Hz sampling frequencies, respectively. The obtained results revealed prime efficiency of the proposed fTDF based EBT system in comparison with other TD descriptors and machine learning classifiers.

Stereo vision is a well-known technique in computer vision used to acquire the 3D depth information of a scene from two or more 2D images. One of the main issues with any stereo vision system is how to make a good trade off between the processing speed and the quality of the disparity map. This issue can be resolved through the use of dedicated hardware platforms, like Field Programmable Gate Arrays and Graphical Processing Units, which are considered as expensive solutions. In this work, the challenge of accelerating stereo matching on low cost multicore platforms is tackled. We present a novel software implementation of a sparse Rank algorithm, that uses a modified Sum of Absolute Differences 1D box filtering algorithm in the correlation stage. Consequently, we reduce the number of computations and memory space needed for computing the disparity map. The system is implemented on a multicore Advanced Risc Machine platform (ODROID XU4). Experimental results show that the system is capable of achieveing a processing speed of 59 Frames Per Second for images of size 320×240 pixels with a disparity range of 20 pixels. Furthermore, the sparse Rank structure does not affect significantly the overall quality of the disparity map.

This Paper presents an Internet of Things (IoT) based framework to monitor ECG for biometric recognition and acceleration for fall detection. To this end, an-IoT based Remote Elderly Monitoring System (REMS) platform is described. REMS consists of a Shimmer3TM device transmitting physiological signal wirelessly to a nearby gateway which routes the data to a remote IoT-platform, able to accommodate dynamically changing configurations. The Shimmer firmware has been modified to send data based on the compressive sensing theory in order to ameliorate energy consumption in addition of real data, and the analysis and processing are done locally on a heterogeneous multicore edge device in order to solve latency issues related to cloud reliance. Subsequently the framework has been designed to handle the different parameter settings and multiple scenarios in a user-friendly way. Furthermore, it allows the user to monitor physiological data and acquire some feedback related to their analysis. Depending on a scenario (energy save, secure communication) the system can be configured manually or automatically to monitor ECG or acceleration data and displays them, it can also identify the subject based on ECG recognition and detect fall if it occurs.

A weakness in the wall of a cerebral artery causing a dilation or ballooning of the blood vessel is known as a cerebral aneurysm. Optimal treatment requires fast and accurate diagnosis of the aneurysm. HemeLB is a fluid dynamics solver for complex geometries developed to provide neurosurgeons with information related to the flow of blood in and around aneurysms. On a cost efficient platform, HemeLB could be employed in hospitals to provide surgeons with the simulation results in real-time. In this work, we developed an improved version of HemeLB for GPU implementation and result visualization. A visualization platform for smooth interaction with end users is also presented. Finally, a comprehensive evaluation of this implementation is reported. The results demonstrate that the proposed implementation achieves a maximum performance of 15,168,964 site updates per second, and is capable of speeding up HemeLB for deployment in hospitals and clinical investigations.

Summary Cerebral aneurysm is a life‐threatening condition. It is a weakness in a blood vessel that may enlarge and bleed into the surrounding area. In order to understand the surrounding environmental conditions during the interventions or surgical procedures, a simulation of blood flow in cerebral arteries is needed. One of the effective simulation approaches is to use the lattice Boltzmann (LB) method. Due to the computational complexity of the algorithm, the simulation is usually performed on high performance computers. In this paper, efficient hardware architectures of the LB method on a Zynq system‐on‐chip (SoC) are designed and implemented. The proposed architectures have first been simulated in Vivado HLS environment and later implemented on a ZedBoard using the software‐defined SoC (SDSoC) development environment. In addition, a set of evaluations of different hardware architectures of the LB implementation is discussed in this paper. The experimental results show that the proposed implementation is able to accelerate the processing speed by a factor of 52 compared to a dual‐core ARM processor‐based software implementation.

Typical real-time remote health monitoring architectures consist of wearable medical devices continuously transmitting physiological signals to a nearby gateway which routes the data to an remote internet of things (IoT)-platform. Unfortunately, this model falls-short under the strict requirements of healthcare systems. Wearable medical devices have short battery lifespans, the system reliance on a cloud makes it vulnerable to connectivity and latency issues, and there are privacy concerns related to streaming sensitive medical data to remote servers. The compressive sensing (CS) scheme has been explored in the context of bio-signals to reduce the energy consumption of wearable sensors. However, CS does not address the other limitations caused by the model's reliance on cloud-computing but exacerbates the associated computing latency by requiring a computationally complex reconstruction process. In our remote elderly monitoring system, we attempt to address this weakness by developing a gateway-centric connected health system, where most signal processing and analysis occurs locally on heterogeneous multicore edge-devices. This paper explores the efficacy of real-time reconstruction of ECG signals, compressed under the CS scheme, on an IoT-gateway powered by ARM's big. LITTLE multicore solution at different signal dimension and allocated computational resources. Experimental results show the gateway's capability to reconstruct ECG signals in real-time, even when considering dimensionally large windows and minimum computational resources. Moreover, they demonstrate that utilizing more cores for the reconstruction process has a higher impact on execution time and is more energy efficient than increasing the cores' frequency. The optimal resource allocation for the majority of cases is a single big (A15) core at minimum frequency as it provides extreme fast reconstruction while consuming less or slightly more energy than its LITTLE (A7) counterpart. Heterogeneous multicore devices have the computational capacity and energy efficiency to elevate some of the limitations of a cloud-based remote health monitoring and can help create a more sustainable IoT-based connected health.

With the development of the Internet of Things (IoT), various large-scale real-time data processing applications for handling real-time sensor data are becoming one of the important applications in cloud computing. The academia, the industry, and even the government institutions have already begun to pay close attention to how to efficiently process large amounts of sensor data in real-time using cloud computing technology. Although cloud computing technology has attracted much attention with high-performance, there are strong needs for improving data processing efficiency of large-scale real-time data for IoT-based applications. In addition to this, currently the IoT paradigm is facing increasing difficulty to handle the data generated from IoT applications. As a result of this, it is challenging to ensure low latency and network bandwidth consumption, optimal utilization of computational recourses, scalability, security, and energy efficiency of IoT devices while moving all data to the cloud. Therefore, this centralized computing model is starting to shift to a decentralized model termed as edge computing, that allows data to be handled from the cloud to local devices such as smartphones, smart gateways or routers, local PCs or sensor nodes on a smaller scale in real-time.

The last decade has witnessed tremendous efforts to shape the Internet of things (IoT) platforms to be well suited for healthcare applications. These platforms are comprised of a network of wireless sensors to monitor several physical and physiological quantities. For instance, long-term monitoring of brain activities using wearable electroencephalogram (EEG) sensors is widely exploited in the clinical diagnosis of epileptic seizures and sleeping disorders. However, the deployment of such platforms is challenged by the high power consumption and system complexity. Energy efficiency can be achieved by exploring efficient compression techniques such as compressive sensing (CS). CS is an emerging theory that enables a compressed acquisition using well-designed sensing matrices. Moreover, system complexity can be optimized by using hardware friendly structured sensing matrices. This paper quantifies the performance of a CS-based multichannel EEG monitoring. In addition, the paper exploits the joint sparsity of multichannel EEG using subspace pursuit (SP) algorithm as well as a designed sparsifying basis in order to improve the reconstruction quality. Furthermore, the paper proposes a modification to the SP algorithm based on an adaptive selection approach to further improve the performance in terms of reconstruction quality, execution time, and the robustness of the recovery process.

A gas discrimination system is mainly made of two parts, the sensing part and the processing part. As an alternative solution to pure software or hardware implementation of the processing part of a gas identification system, this paper proposes a gas discrimination system and its implementation on the Zynq system on chip platform using hardware/software co-design approach. In addition, the recommended system uses principal component analysis for dimensionality reduction, binary decision tree for classification and a 4×4 in-house gas sensor array for sensing. Moreover, k-nearest neighbors classifier is also used and compared with decision tree. MATLAB is used for simulation and validation before the final implementation on the Zynq. Algorithms are implemented using high level synthesis and different optimization directives are applied. Hardware implementation results on the Zynq show that real-time performances can be achieved for proposed e-nose system using hardware/software co-design approach with a single ARM processor running at 667 MHz and the programmable logic running at 142 MHz.

This paper proposes a hardware/software co-design approach using the Zynq platform for the implementation of an electronic nose (EN) system based on principal component analysis (PCA) as a dimensionality reduction technique and decision tree (DT) as a classification algorithm using a 4x4 in-house fabricated sensor. The system was successfully trained and simulated in MATLAB environment prior to the implementation on the Zynq platform. High level synthesis was carried out on the proposed designs using different optimization directives including loop unrolling, array partitioning and pipelining.

This paper presents an innovative and safe connected health solution for human identification. The system consists of the encryption and decryption of ECG signals using the advanced encryption standard (AES) as well as the recognition of individuals based on ECG biometrics. Heterogeneous and efficient implementation of the proposed system has been performed on a Xilinx ZC702 Zynq based prototyping board. Various IP-cores have been created based on the high level synthesis (HLS) implementation of the AES cipher, AES decipher and ECG identification blocks. The proposed hardware implementation has shown promising results since it met the real-time requirements and outclassed current field programmable gate array (FPGA) based systems in multiple key metrics including power consumption, processing time and hardware resources usage. The implemented system needs 10.71 ms to process one ECG sample and consumes 107mW while using only 30% of all available on-chip resources.

In this paper, we present a novel architecture based on field-programmable gate arrays (FPGAs) for the reconstruction of compressively sensed signal using the orthogonal matching pursuit (OMP) algorithm. We have analyzed the computational complexities and data dependence between different stages of OMP algorithm to design its architecture that provides higher throughput with less area consumption. Since the solution of least square problem involves a large part of the overall computation time, we have suggested a parallel low-complexity architecture for the solution of the linear system. We have further modeled the proposed design using Simulink and carried out the implementation on FPGA using Xilinx system generator tool. We have presented here a methodology to optimize both area and execution time in Simulink environment. The execution time of the proposed design is reduced by maximizing parallelism by appropriate level of unfolding, while the FPGA resources are reduced by sharing the hardware for matrix-vector multiplication across the data-dependent sections of the algorithm. The hardware implementation on the Virtex6 FPGA provides significantly superior performance in terms of resource utilization measured in the number of occupied slices, and maximum usable frequency compared with the existing implementations. Compared with the existing similar design, the proposed structure involves 328 more DSP48s, but it involves 25802 less slices and 1.85 times less computation time for signal reconstruction with N = 1024, K = 256, and m = 36, where N is the number of samples, K is the size of the measurement vector, and m is the sparsity. It also provides a higher peak signal-to-noise ratio value of 38.9 dB with a reconstruction time of 0.34 μs, which is twice faster than the existing design. In addition, we have presented a performance metric to implement the OMP algorithm in resource constrained FPGA for the better quality of signal reconstruction.

Fall detection is a major problem in healthcare systems, especially for elderly people who are the most vulnerable. It is important to design and implement not only an accurate fall detection system (FDS) but also a system with a real-time response. The achievement of high accuracy and fast response time together allows the development of a system that helps saving lives, time and money in healthcare industry. This paper presents the design, simulation and implementation of a novel FDS using the Shimmer wearable sensor. The discrete wavelet transform (DWT) is applied for preprocessing the data coming from the Shimmer platform, principal component analysis (PCA) is used for dimensionality reduction and feature extraction and finally, a binary decision tree (DT) is utilized for classification purpose. The system is simulated in MATLAB prior to the implementation on the Zynq system-on-chip (SoC) for hardware acceleration. DWT is executed on the processing system (PS) of the Zynq platform in a software manner while PCA and DT are both implemented on the programmable logic (PL) for hardware acceleration. PCA and DT are developed in C and synthesized in Vivado high level synthesis (HLS) tool to transform the C based designed into a register transfer level (RTL) implementation. Various optimization techniques are explored in Vivado HLS. The performance of the FDS in terms of accuracy of the classifier is 88.4% while the overall resources used in PL of the Zynq vary between 2% and 23% depending on the running frequency and optimization technique used.

This paper presents a high speed configurable FPGA architecture for bilateral filtering. The proposed architecture is highly pipelined, parallel and fully configurable. It can achieve an operating frequency of 450 MHz and a throughput of one pixel value per clock cycle. This is almost three times faster than any reported FPGA architecture with such a throughput. Line Buffering was implemented using a novel BRAM architecture that ensures access to all pixels of the filter window in a single clock cycle. The proposed BRAM architecture also addresses the high speed and throughput requirements of convolution functions in image processing algorithms.

Long-time cycle wireless monitoring of patients with health concerns is highly required. The quality of care, ability of fall detection and prevention is tremendously increased through enabling continous remote human movement monitoring. The aim of this paper is twofold. Firstly, to propose a real-time energy-aware wireless fall detection system based on emerging compresive sensing (CS). Secondly, to define the best way for an efficient deployment of CS-based approach on limited hardware resources sensing platforms. In addition a compression algorithm for high accuracy fall recognition is presented. The CS-based approach is carried out on the low power Shimmer sensing platform, and is aimed to reduce the 3D acceleration data for energy efficiency improvement of the energy-hungry wireless links. The sparsity degree for an efficient representation of 3D acceleration signal and high fall detection accuracy rate is also studied. Interestingly, our results show an average power consumption of less than 38% on the Shimmer Bluetooth link, and the average 3D acceleration data compression rate is about 56%. In addition, an error between the original and reconstruted 3D acceleration signal of 7% after applying CS would yield a space savings of 56% and fall detection accuracy of 96%, for a sparsity S=77 and signal length N=512. Moreover, the proposed energy-aware fall detection system has been proven to distinguish among falls and activities of daily living, and the accuracy has been evaluated in terms of specificity and sensitivity and has shown excellent results.

This paper proposes an approach for the joint optimization of multiview video coding (MVC) and a forward error correction method based on Turbo codes. The scheme minimizes the reconstructed 3D video distortion at the display subject to a constraint on the overall transmission bitrate budget. The minimization is achieved by exploiting the source rate distortion characteristics and the statistics of the available codes. Experimental results show that the proposed approach outperforms conventional equal error protection techniques at different signal-to-noise ratios. It also significantly improves the performance of end to end 3D content transmission at high packet loss rate or low signal-to-noise ratio.

This paper presents a high speed configurable FPGA architecture for k-means clustering. The proposed architecture is highly pipelined, parallel and fully configurable. It can achieve an operating frequency of 400 MHz, which is at least three times faster than prior works. The proposed architecture addresses the high speed and throughput requirements of machine vision, multi-media and data mining applications.

Recent Xilinx field programmable gate arrays (FPGAs) enables embedded systems to adapt their hardware functionalities at run-time using dynamic partial reconfiguration (DPR). This paper presents a generic file system to support standard operating systems (OS) for efficient FPGA resources management and implementation of intellectual property (IP) cores using DPR technology. The proposed generic file system for FPGAs (FPGAFS) provides a generic and flexible solution to abstract the hardware resources such as DPR regions. FPGAFS concept is described and has been validated through the implementation of image processing IP cores. Evaluation of framework performance is also carried out to identify different trad-offs and bottlenecks.

This study presents the design and implementation of efficient architectures for finite Radon transform (FRAT) on a field programmable gate array (FPGA). FPGA-based architectures with two design strategies have been proposed: direct implementation of pseudo-code with a sequential or pipelined description, and a block random access memory-based approach. Various medical images modalities have been deployed for both software evaluation and hardware implementation. Xilinx DSP tool has been used to improve the implementation time and reduce the design cycle and the Xilinx software has been used for generating a hardware description language from a high-level MATLAB description. Objective evaluation of image denoising using FRAT is carried out and demonstrates promising results. Moreover, the impact of different block sizes on image reconstruction has been analysed. Performance analysis in terms of area, maximum frequency and throughput is presented and reveals significant achievements.

The prevailing application of positron emission tomography (PET) in clinical oncology and the increasing number of patient scans have led to a real need for efficient PET volume handling and the development of new volume analysis and classification approaches to aid clinicians in the diagnosis of diseases, planning of treatment, and patient fast recovery. Analysing large medical volumes using traditional techniques produces sometimes poor accuracy. Thus, this paper proposes a committee machine based on feed forward neural network, neuro-fuzzy, self-organising map, fuzzy c-means, and K-means. Different combination approaches were evaluated and the best results were achieved using weighted averaging approach. PET Zubal phantom data set containing 3 lung tumours has been utilised to validate the proposed committee machine which has shown promising results.

This paper describes the design and implementation of context-based adaptive variable length coding (CAVLC) and comparative analysis of trade-off offered by integer transform (IT) and discrete wavelet transform (DWT) for three dimensional 3-D medical image compression systems. The proposed system architectures were synthesised using VHDL and implemented on Xilinx University Program XUPV5-LX110T prototyping board and processed medical volumes were also simulated in MATLAB. An in-depth performance analysis for both software and hardware implementations is presented and reveals a significant achievement.

The increasing numbers of patient scans and the prevailing application of positron emission tomography (PET) in clinical oncology have led to a need for efficient PET volume handling and the development of new volume analysis approaches to aid clinicians in the diagnosis of disease and planning of treatment. A novel automated system for oncological PET volume segmentation is proposed in this paper. The proposed intelligent system is using competitive neural network (CNN) and learning vector quantisation neural network (LVQNN) for clustering and quantifying phantom and real PET volumes. Bayesian information criterion (BIC) has been used in this system to assess the optimal number of clusters for each PET data set. The experimental study using phantom PET volume was conducted for quantitative evaluation of the performance of the proposed segmentation algorithm. The analysis of the resulting segmentation of clinical oncological PET data seems to confirm that this approach shows promise and can successfully segment patient lesion.

Tumour classification and quantification in positron emission tomography (PET) imaging at early stage of illness are important for radiotherapy planning, tumour diagnosis, and fast recovery. Analysing large medical volumes using traditional techniques requires a decent amount of time, and in some approaches poor accuracy is achieved. Artificial intelligence (AI) technologies can provide better accuracy and save decent amount of time. Artificial neural network (ANN), as one of the best AI technologies, has the capability to classify, measure precisely the region of interest, and model the clinical evaluation for a specific problem. This paper presents a novel application of the ANN in the wavelet domain for PET volume segmentation. ANN performance evaluation using different number of hidden neurons is also considered. The proposed intelligent system outputs are compared with the outputs of thresholding, and clustering based approaches. Two PET phantom data sets and real PET volumes have been utilised to validate the proposed system which has shown promising results.

The development of the security layers between the wireless terminals is one of the biggest trends in wireless communications. Bluetooth can be described as the short range and the low power supplements that holds the connection protocol through various devices. This paper presents the development of a secure wireless connection terminals on a field programmable gate array (FPGA). The wireless connection has been established using Bluetooth technology and the initialisation of a secure algorithm for data exchange is implemented using the advanced encryption standards (AES). The proposed system has been validated and demonstrated using using an image processing application which involves the encryption and decryption of acquired images from the RC10 FPGA prototyping board's cam-era. The evaluation of different building block has been carried out in terms of area, resources used and power consumption.

Tumour classification and quantification in positron emission tomography (PET) imaging at early stage of illness are important for radiotherapy planning, tumour diagnosis, and fast recovery. There are many techniques for segmenting medical images, in which some of the approaches have poor accuracy and require a lot of time for analyzing large medical volumes. Artificial intelligence (AI) technologies can provide better accuracy and save decent amount of time. Artificial neural network (ANN), as one of the best AI technologies, has the capability to classify, measure the region of interest precisely, and model the clinical evaluation. This paper proposes an intelligent system based on multilayer ANN, multiresolution analysis, and thresholding. The system has been evaluated and tested on phantom and real PET images, promising results have been achieved.

Latent semantic indexing (LSI) is commonly used to match queries to documents in information retrieval (IR) applications. This paper presents a new philosophy for LSI, investigating the use of various hybrid approaches and presents a novel evaluation strategy based on the use of image processing tools. The authors evaluate the use of the discrete cosine transform (DCT) and Cohen Daubechies Feauveau 9/7 (CDF9/7) wavelet transform as a pre-processing step for the singular value decomposition (SVD) step of the LSI system. In addition, the effect of different threshold types on the search results is examined. The results show that accuracy can be increased by applying both transforms as a pre-processing step, with better performance for the hard-threshold function. The choice of the best threshold value is a key factor in the transform process.

The nature of some scientific computing applications involves performing complex tasks repeatedly on floating-point data, often under real-time requirements. Therefore, high performance systems are required by the developers for fast computations. Many researchers have begun to recognize the potential of reconfigurable hardware such as field-programable gate arrays in implementing floating-point arithmetic. In this paper a floating-point adder and multiplier are presented. The proposed cores are used as basic components for the implementation of a parallel floating-point matrix multiplier designed for 3D afflne transformations. The cores have been implemented on recent FPGA devices. The performance in terms of area/speed of the proposed architectures has been assessed and has shown that they require less area and can be run with a higher frequency when compared with existing systems.

Inner product (IP) forms the basis of a number of signal processing algorithms and applications such as transforms, filters, communication systems etc. Distributed arithmetic (DA) provides an effective methodology to implement IP of vectors and matrices using a simple combination of memory elements, adders and shifters instead of lumped multipliers. This bit level rearrangement results in much higher computational efficiencies and yields compact designs highly suited for high performance resource constrained applications. Offset binary coding (OBC) is an effective technique to further optimize the DA, and allows us to reduce the memory requirements by a factor of two, with minimum additional computational complexity. This makes OBC-DA attractive for applications that are both resource and memory constrained. In addition, sparse matrix factorization techniques can be exploited to further reduce the size of the DA-ROMs. In this paper, the design and implementation of a novel OBC based DA is demonstrated using a generic architecture for implementing discrete orthogonal transforms (DOTs). Implementation is performed on the Xilinx Virtex-II Pro field programmable gate array (FPGA), and a detailed comparison between conventional and OBC based DA is presented to highlight the trade offs in various design metrics including performance, area and power.

Fast Hadamard transform (FHT) belongs to the family of discrete orthogonal transforms and is used widely in image and signal processing applications. In this paper, a parameterizable and scalable architecture for FHT with time and area complexities of O(2(W+1)) and O(2N2), respectively, has been proposed, where W and N are the word and vector lengths. A novel algorithmic transformation for the FHT based on sparse matrix factorization and distributed arithmetic (DA) principles has been presented. The architecture has been parallelized and pipelined in order to achieve high throughput rates. Efficient and optimized field-programmable gate array implementation of the proposed architecture that yield excellent performance metrics has been analyzed in detail. Additionally, a functional level power analysis and modeling methodology has been proposed to characterize the various power and energy metrics of the cores in terms of system parameters and design variables. The mathematical models that have been derived provide quick presilicon estimate of power and energy measures, allowing intelligent tradeoffs when incorporating the developed cores as subblocks in hardware-based image and video processing systems

In this paper we present a novel design for an efficient FPGA architecture of fast Walsh transform (FWT) for hardware implementation of pattern analysis techniques such as projection kernel calculation and feature extraction. The proposed architecture is based on distributed arithmetic (DA) principles using ROM accumulate (RAC) technique and sparse matrix factorisation. The implementation has been carried out using a hybrid design approach based on Celoxica Handel-C which is used as a wrapper for highly optimised VHDL cores. The algorithm has been implemented and verified on the Xilinx Virtex-2000E FPGA. An evaluation has also been reported based on maximum system frequency and chip area for different system parameters, and have been shown to outperform existing work in all key performance measures. Additionally, a novel functional level power analysis and modelling (FLPAM) methodology has been proposed to enable a high level estimation of power consumption.

A framework for power optimisation on FPGA based designs at various functional levels, and high level power estimation methodologies have been presented in this paper. Results obtained are very promising and the developed framework can be employed to power down the FPGA, estimate and model the power for other parameterisable IP cores

The finite radon transform (FRAT) is a fundamental block of the curvelet and ridgelet transforms, both of which were recently introduced to overcome the limitations of wavelets. In this paper, two novel high speed/low power VLSI architectures for the FRAT are presented. Both are serial input architectures and have a time complexity of O(p/sup 2/(p+1)) and O(p/sup 2/) respectively, where p is the block size. The first architecture is fully scaleable, while the second architecture is further optimised for high throughput and low power. Both architectures are implemented on the Virtex FPGA series, and prototyped on the Celoxica RC1000 development board.

Inner product is an important operation in image processing applications dealing with discrete orthogonal transforms (DOTs). In this paper, a novel power efficient architecture for the computation of inner product is proposed, along with an analysis of the dynamic power consumption of the proposed algorithm. A comparison is made with the conventional distributed arithmetic (DA) approach for computing the inner product. The proposed architecture has been tested and implemented on the Xilinx Virtex-E FPGA. Results obtained have shown that, the total power consumption and the number of LUT required to implement the design of the proposed algorithm is reduced by 51% and 77% respectively in comparison with the conventional DA approach.

We propose an efficient extension of set partitioning in hierarchical trees (SPIHT) for very low bit-rate wavelet based color image coding. Since the chrominance components I and Q in the YIQ format are sufficiently less significant in terms of energy compared to the luminance component, the trees within each chrominance plane are joined together in the list of insignificant sets (LIS) according to a virtual relationship parent-descendants specific to the chrominance components. For generating a fully embedded bit stream similar to SPIHT, the proposed method improves the performance of the color SPIHT based scheme, especially for very low bit rate.

The three-dimensional wavelet transform is extremely important for image and video processing. The paper presents a number of three dimensional non-separable wavelet transforms, each of which is obtained using a lifting scheme. The performances of the new wavelets in terms of psycho-visual reconstruction quality and peak signal-to-noise ratio are compared to tensor product wavelets in a lossy image compression application.

This paper presents the implementation on FPGA of a block SVD method for image denoising. This method exploits the fact that only the smallest singular values are affected by the noise and therefore can be discarded, leading to an efficient nonlinear image filtering. An efficient architecture for singular value decomposition, (SVD) based on the Brent, Luk, Van loan (BLV) systolic array, has been proposed. The architecture is three times more efficient and three times faster than the existing BLV structure. An optimised implementation has been efficiently carried out on the PP-RC1000 board using a high level language "Handel-C" for hardware design.

Grey level co-occurrence matrix (GLCM), one of the best known tool for texture analysis, estimates image properties related to second-order statistics. These image properties commonly known as Haralick texture features can be used for image classification, image segmentation, and remote sensing applications. However, their computations are highly intensive especially for very large images such as medical ones. Therefore, methods to accelerate their computations are highly desired. This paper proposes the use of reconfigurable hardware to accelerate the calculation of GLCM and Haralick texture features. The performances of the proposed co-processor are then assessed and compared against a microprocessor based solution.

This paper presents an efficient systolic array for the computation of the Singular Value Decomposition (SVD). The proposed architecture is three times more efficient and faster than the Brent, Luk, Van Loan (BLV) SVD systolic array. The architecture has been implemented efficiently on FPGA using a high level language for hardware design "Handel-C".

3D graphics performance is increasing faster than any other computing application. Almost all PC systems now include 3D graphics accelerators for games, Computer Aided Design (CAD) or visualization applications. This paper investigates the suitability of Field Programmable Gate Array (FPGA) devices as a low cost solution for implementing 3D affine transformations. A proposed solution based on processing large matrix multiplication has been implemented, for large 3D models, on the RC1000-PP Celoxica board based development platform using Handel-C, a C-like language supporting parallelism, flexible data size and compilation of high-level programs directly into FPGA hardware.

Matrix multiplication is very important in many types of applications including image and signal processing. This paper presents an investigation into the design and implementation of matrix product algorithm using different design approaches such as Handel-C and VHDL, where the performance of both programming languages have been presented. Solutions for processing large matrix products based partitioning methodology have been described. The proposed system has been implemented and verified using the RC1000-PP Celoxica board based development platform.

Applications based on Fast Fourier Transform (FFT) such as signal and image processing require high computational power, plus the ability to experiment with algorithms. Reconfigurable hardware devices in the form of Field Programmable Gate Arrays (FPGAs) have been proposed as a way of obtaining high performance at an economical price. At present, however, users must program FPGAs at a very low level and have a detailed knowledge of the architecture of the device being used. To try to reconcile the dual requirements of high performance and ease of development, this paper reports on the design and realisation of a High Level framework for the implementation of 1-D and 2-D FFTs for real-time applications. Results show that the parallel implementation of 2-D FFT achieves virtually linear speed-up and real-time performance for large matrix sizes. Finally, an FPGA-based parametrisable environment based on the developed parallel 2-D FFT architecture is presented as a solution for frequency-domain image filtering application.

Discrete Hartley transforms (DHTs) are very important in many types of applications including image enhancement, acoustics, optics, telecommunications and speech signal processing. Two novel architectures for computing DHTs using both systolic architecture and distributed arithmetic design methodologies are presented in this paper. The first approach uses the modified Booth-encoder-Wallace trees multiplication (MBWM) algorithm for a systolic architecture implementation. The second approach is based on distributed arithmetic ROM and accumulator structure. Implementations of the algorithms on a Xilinx FPGA board are described. Distributed arithmetic approach exhibits better performances when compared with the systolic architecture approach.

The paper is concerned with the development of an unsupervised segmentation algorithm for multispectral images. Due to the high dimensionality of these images, the underlining motivation of this work is on how to build up a robust unsupervised segmentation algorithm with acceptable computational complexity. After an initial approximate segmentation using the EM algorithm, a cost function associated to each pixel is proposed. This function includes a term that measures how close the pixel at hand is to the region's distribution centroids, and another term that measures the local homogeneity in the pixel's neighborhood. In addition, an edge progression technique is used to re-label pixels optimally. Extensive experiments have been carried out on many multispectral images and quantitative results have shown the efficiency of the approach.

This paper describes two approaches suitable for an FPGA implementation of Walsh-Hadamard transforms. These transforms are important in many signal processing applications including speech compression, filtering and coding. Two novel architectures for the fast Hadamard transforms using both systolic architecture and distributed arithmetic techniques are presented. The first approach uses the Baugh-Wooley multiplication algorithm for a systolic architecture implementation. The second approach is based on both distributed arithmetic ROM and accumulator structure, and a sparse matrix factorisation technique. Implementations of the algorithms on a Xilinx FPGA board are described. Distributed arithmetic approach exhibits better performances when compared with the systolic architecture approach.

Image texture segmentation is an important problem and occurs frequently in many image processing applications. Although, a number of algorithms exist in the literature. Methods that rely on the use of expectation-maximisation algorithm are gaining a growing interest. The main feature of this algorithm is that it is capable of estimating the parameters of mixture distribution. This paper presents a novel unsupervised algorithm based on expectation-maximisation algorithm where the analysis is applied on vector data rather than the grey level. This is achieved by defining a likelihood function which measures how the estimated features are fitting the present data. Experimental results on images containing various synthetic and natural textures have been carried out and a comparison with existing and similar techniques has shown the superiority of the proposed method.