Demo Data from VLDB 2026 / reviewers in the wild / expert
Nicole Drechsler
dblp:d/NicoleDrechsler · also Nicole Göckel
· DBLP profile ↗
18ranked-venue papers
6as first author
0since 2021 · last 2015
—ORCID · none
Domains — the database's venue-derived domains; a paper can count in several
Systems, architecture and hardware · 10 · 2 first-authorArtificial intelligence and machine learning · 8 · 4 first-authorHuman-computer interaction and ubiquitous computing · 2 · 1 first-authorSoftware engineering, systems software and programming languages · 1
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Computer architecture, parallel and distributed computing, and storage systems
2 papers |
Electronic design automation · 95% Integrated circuit design · 5% | |
| Theoretical computer science
1 paper |
Mathematical optimization · 50% Automata and formal languages · 50% |
Topics — the 8 heaviest of 8, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
Electronic design automation
logic synthesis |
0.0 | 2 | 2000 | Fast exact minimization of BDD's · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2000 Fast Exact Minimization of BDDs · DAC 1998 |
Electronic design automation › logic synthesis › variable ordering
BDD variable ordering |
0.0 | 1 | 2000 | Fast exact minimization of BDD's · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2000 |
Electronic design automation › logic synthesis
decision diagrams |
0.0 | 1 | 2000 | Fast exact minimization of BDD's · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2000 |
Mathematical optimization
combinatorial optimization |
0.0 | 1 | 2000 | Fast exact minimization of BDD's · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2000 |
Automata and formal languages › automata algorithms
exact minimization |
0.0 | 1 | 2000 | Fast exact minimization of BDD's · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2000 |
Electronic design automation › logic synthesis › decision diagrams
binary decision diagram minimization |
0.0 | 1 | 1998 | Fast Exact Minimization of BDDs · DAC 1998 |
Electronic design automation › logic synthesis
variable ordering |
0.0 | 1 | 1998 | Fast Exact Minimization of BDDs · DAC 1998 |
Integrated circuit design
VLSI design |
0.0 | 1 | 2000 | Fast exact minimization of BDD's · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2000 |
Methods — techniques the papers use, named apart from their topics
hashing · 0.1symmetry · 0.1lower bound technique · 0.0lower bound techniques · 0.0
| Year | Publication | Venue | Position |
|---|---|---|---|
| 2015 | Incorporating user preferences in many-objective optimization using relation ε-preferred
Nicole Drechsler, André Sülflow, Rolf Drechsler |
Nat. Comput. | 1 |
| 2013 | Incorporating User Preferences in Many-Objective Optimization using Relation Epsilon-Preferred
Nicole Drechsler, André Sülflow, Rolf Drechsler |
IJCCI | 1 |
| 2007 | Robust Multi-Objective Optimization in High Dimensional Spaces
André Sülflow, Nicole Drechsler, Rolf Drechsler |
EMO | 2 |
| 2003 | Minimizing the number of one-paths in BDDs by an evolutionary algorithmabstractOrdered binary decision diagrams (BDDs) are used in VLSI CAD, especially for the canonical representation of Boolean functions. In the last decade, the method of choice for optimizing this data structure was minimizing the number of nodes in the associated graph. However, recent works have shown that the number of paths is also important. In this work, minimizing the number of one-paths of BDDs is accomplished by an evolutionary algorithm (EA) acting on the permutation of variables. The optimal operator weights for the EA were determined by a parameter study. Experimental results demonstrate the efficiency of our approach. Mario Hilgemeier, Nicole Drechsler, Rolf Drechsler |
IEEE Congress on Evolutionary Computation | 2 |
| 2003 | Fast Heuristics for the Edge Coloring of Large GraphsabstractHeuristic algorithms for coloring the edges of large undirected single-edge graphs with (or very close to) the minimal number of colors are presented. Compared to simulated annealing and a grouping genetic algorithm for small graphs, the heuristics were not only faster by orders of magnitude, but almost all solutions had the optimal color number; the rest differed by at most two colors. For large graphs, the heuristics were validated by an evolutionary algorithm. Here, the heuristics often found an optimum or a solution very close to it. Mario Hilgemeier, Nicole Drechsler, Rolf Drechsler |
DSD | 2 |
| 2003 | Exploration of Sequential Depth by Evolutionary Algorithms
Nicole Drechsler, Rolf Drechsler |
VLSI-SOC | 1 |
| 2001 | Multi-objective Optimisation Based on Relation Favour
Nicole Drechsler, Rolf Drechsler, Bernd Becker 0001 |
EMO | 1 |
| 2001 | Heuristic Learning Based on Genetic Programming
Nicole Drechsler, Frank Schmiedle, Daniel Große, Rolf Drechsler |
EuroGP | 1 |
| 2001 | Combining GAs and Symbolic Methods for High Quality Tests of Sequential Circuits
Martin Keim, Nicole Drechsler, Rolf Drechsler, Bernd Becker 0001 |
J. Electron. Test. | 2 |
| 2000 | Specialized Hardware for Implementation of Evolutionary Algorithms
Tobias Schubert 0001, Elke Mackensen, Nicole Drechsler, Rolf Drechsler, Bernd Becker 0001 |
GECCO | 3 |
| 2000 | OKFDD minimization by genetic algorithms with application to circuit design
Rolf Drechsler, Bernd Becker 0001, Nicole Drechsler |
Integr. | 3 |
| 2000 | Fast exact minimization of BDD'sabstractWe present a new exact algorithm for finding the optimal variable ordering for reduced ordered binary decision diagrams (BDD's). The algorithm makes use of a lower bound technique known from very large scale integration design. Up to now this technique has been used only for theoretical considerations and it is adapted here for this purpose. Furthermore, the algorithm supports symmetry aspects and uses a hashing based data structure. Experimental results are given to demonstrate the efficiency of our approach. We succeeded in minimizing several functions, including adders with up to 64 variables, for which all other previously presented approaches fail. Rolf Drechsler, Nicole Drechsler, Wolfgang Günther 0001 |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. | 2 |
| 1999 | Exploiting Don't Caers During Data Sequencing using Genetic AlgorithmsabstractIn this paper we present a Genetic Algorithm (GA) for the Data Ordering Problem (DOP) where Don't Cares (DCs) are assigned during optimization. The DOP has large application in the area of low power design and circuit testing. We implemented a GA to solve this problem and discuss several applications. We carried out a large set of experiments. A comparison of our results to previously published demonstrates the efficiency of our approach. Rolf Drechsler, Nicole Drechsler |
ASP-DAC | 2 |
| 1999 | Combining GAs and Symbolic Methods for High Quality Tests of Sequential CircuitsabstractA symbolic fault simulator is integrated in a Genetic Algorithm (GA) environment to perform Automatic Test Pattern Generation (ATPG) for synchronous sequential circuits. In a two phase algorithm, test length and fault coverage as well are optimized. However, there are circuits with bad random testability properties, that are also hard to test using genetically optimized test patterns. Thus, deterministic aspects are included in the GA environment to improve fault coverage. Experiments demonstrate that tests with higher fault coverages and considerably shorter test sequences than in previously presented approaches are obtained. Martin Keim, Nicole Drechsler, Bernd Becker 0001 |
ASP-DAC | 2 |
| 1999 | Variable Reordering for Shared Binary Decision Diagrams Using Output ProbabilitiesabstractThe shared binary decision diagram (SBDD) with negative edge attributes can represent many functions in a compact form if a proper variable ordering is used. In this work we describe a technique for reordering the variables in an SBDD to reduce the size of the data structure. We use a heuristic to formulate a technique for the reordering problem based on probability metrics. Mitchell A. Thornton, J. P. Williams, Rolf Drechsler, Nicole Drechsler |
DATE | 4 |
| 1998 | Fast Exact Minimization of BDDsabstractWe present a new exact algorithm for finding the optimal variable or deringfor r educ edordered Binary Decision Diagrams (BDDs). The algorithm makes use of a lower bound technique known from VLSI design.Up to now this technique has been use donly for the oreticalconsider ationsand it is adapte dhere for our purp ose. Furthermore, the algorithm supports symmetry aspects and makes use of a hashing b aseddata structure. Exp erimental esults are given to demonstrate the efficiency of our appr oach. We succeeded in minimizing adder functions with up to 64 variables, while all other pr eviously pr esente d appr oaches fail. Rolf Drechsler, Nicole Drechsler, Wolfgang Günther 0001 |
DAC | 2 |
| 1997 | Learning heuristics for OKFDD minimization by evolutionary algorithmsabstractOrdered Kronecker Functional Decision Diagrams (OKFDDs) are a data structure for efficient representation and manipulation of Boolean functions. OKFDDs are very sensitive to the chosen variable ordering and the decomposition type list, i.e. the size may vary from linear to exponential. In this paper we present an Evolutionary Algorithm (EA) that learns good heuristics for OKFDD minimization starting from a given set of basic operations. The difference to other previous approaches to OKFDD minimization is that the EA does not solve the problem directly. Rather, it develops strategies for solving the problem. To demonstrate the efficiency of our approach experimental results are given. The newly developed heuristics combine high quality results with reasonable time overhead. Nicole Drechsler, Rolf Drechsler, Bernd Becker 0001 |
ASP-DAC | 1 |
| 1996 | Learning Heuristics for OBDD Minimization by Evolutionary Algorithms
Rolf Drechsler, Nicole Drechsler, Bernd Becker 0001 |
PPSN | 2 |