In this paper, a two-step methodology is introduced to analyse the mapping of cyclostationary feature detection (CFD) onto a multi-core processing platform. In the first step, the tasks to be executed by each core are determined in a structured way using techniques known from the design of array processors. In the second step, the implementation of tasks on a processing core is analysed. Using this methodology, it is shown that calculating a 127 times 127 discrete spectral correlation function requires approximately 140 mus on a tiled system on chip (SoC) with 4 Montium cores

This paper addresses the hardware implementation of a dynamic scheduler for non-manifest data dependent periodic loops. Static scheduling techniques which are known to give near optimal scheduling-solutions for manifest loops, fail at scheduling non-manifest loops, since they lack the run time information needed which makes a static schedule feasible. In this paper a dynamic scheduling approach was chosen to circumvent this problem. We present a case study using VHDL where the focus lies on implementations with minimal memory usage and low communication overhead between various components of the architecture. This has resulted in an efficient and synthesisable system.

The correctness of the behavior of a fault-tolerant system depends among other things on the correct distribution of the data descending from unreliable I/O devices over the modules of the fault-tolerant system, the so-called input-problem. More generally, a maliciously behaving system, whether it is fault-tolerant or not, should never defeat a correctly functioning fault-tolerant system, i.e. a system which does not contain more faulty modules than it is designed to tolerate. This paper presents a new class of synchronous deterministic non-authenticated algorithms for reaching Byzantine agreement on data descending from other (fault-tolerant) devices. The algorithms are based on voting and error-correcting codes and require considerably less data communication than the existing algorithms, whereas the number of rounds and the number of modules meet the minimum bounds.

In order to make a dependable distributed computer system resilient to arbitrary failures of its processors, deterministic interactive consistency algorithms (ICAs) are required. Thus far, in order to guarantee interactive consistency, all ICAs found in the literature require that all correct processors in the system start the algorithm simultaneously. In a distributed system, it is hard to satisfy this requirement. Therefore, in this paper, we describe a new class of self-synchronizing ICAs that guarantee interactive consistency without the above-mentioned requirement.

This paper describes a new fault-tolerant computer architecture based on a "distributed implementation" of a symbol- error correcting code. In this, as at is called, (N, K) concept the faults are masked by this code. The (N, K) concept is described in detail for N = 4 and K = 2. It is shown that symbol-error correcting codes having additional bit-error correcting capabilities make additional memory protection by means of bit-error correcting codes superfluous and a newly designed symbol- and bit-error correcting code for the (4,2) concept is presented. In order to cope with unreliable input devices, the interactive consistency problem is redefined and an algorithm is presented which solves this problem. The practical implementation of this algorithm in the (4,2) concept is described in detail.

Maximum distance separable (MDS) convolutional codes are defined as the row space overF(D)of totally nonsingular polynomial matrices in the indeterminateD. These codes may be used to transmit information onnparallel channels when a temporary or even an infinite break can occur in some of these channels. Their algebraic properties are emphasized, and the relevant parameters are introduced. On this basis two decoding procedures are described. Both procedures correct arbitrarily long error sequences that may occur at the same time in some of thenchannels. Some specific constructions of MDS convolutional codes are presented.