Electrotactile stimulation can evoke a wide range of sensations, including taps, squeezes, and strokes. Although verbal descriptors are available for vibrotactile and ultrasound stimuli, a comprehensive list has not been developed for electrotactile experiences. To address this, we used a text normalization approach to generate descriptors for wearable electrotactile research and design. In Experiment 1 (N=14), Dutch participants provided 504 open-ended descriptions in response to 36 electrotactile stimuli on the forearm. These were processed into 71 unique English descriptors with considerable inter-rater reliability. Experiment 2 (N=24) evaluated a reduced list of 42 descriptors under additional stimulation conditions, showing robust and consistent descriptor usage, also across varying stimulus intensities. This list partially overlaps with previous non-electrotactile descriptor lists but also includes terms that seem to be unique to electrotactile sensations. Altogether, our findings contribute to the development of common verbal descriptors for electrotactile stimulation, supporting future wearable haptic research and design.

Assessment of open-ended assignments such as programming projects is a complex and time-consuming task. When students learn to program, however, they benefit from receiving timely feedback, which requires an assessment of their current work. Our goal is to build a tool that assists in this process by partially automating the assessment of open-ended programming assignments. In this paper we discuss the requirements for this tool, based on interviews with teachers and other relevant stakeholders.

Our university offers an IT-based design programme, with an engineering background in Computer Science and Electrical Engineering. Its focus on design and creativity, as well as the diversity of the students, requires an approach in informatics courses different from classical computer science programmes. While tinkering is an increasingly popular approach in STEM stimulation and education outside university, we argue that also in an academic setting a tinkering mindset has a relevant contribution. In this paper, we identify key elements in setting up tinkering sessions and report on their implementation for a course on algorithms. We will present and discuss results and observations of our teaching method, that are promising to continue and extend the tinkering approach in an academic setting

Abstract Model‐based design is a promising technique to improve the quality of software and the efficiency of the software development process. We are investigating how to efficiently model embedded software and its environment to verify the requirements for the system controlled by the software. The software environment consists of mechanical, electrical and other parts; modelling it involves learning how these parts work, deciding what is relevant to model and how to model it. It is not possible to fully automate these steps. There are general guidelines, but given that every modelling problem differs, much is left to the modeller's own preference, background and experience. Still, when the next generation of a system is designed, the new system will have common elements with its previous version. Therefore, lessons learned from the current model could inform future models. We propose a framework for identifying the non‐formal elements of knowledge, insights and a model itself, which can support modelling of the next system generation. We will present the application of our framework on an action research case – modelling mechanical parts of a paper‐inserting machine.

We propose a method for engineering security protocols that are aware of timing aspects. We study a simplified version of the well-known Needham Schroeder protocol and the complete Yahalom protocol, where timing information allows the study of differ

RTnet is a distributed real-time network protocol for fully-connected local area networks with a broadcast capability. It supports streaming real-time and non-realtime traffic and on-the-fly addition and removal of network nodes. This paper presents a formal analysis of RTnet using the model checker Uppaal. Besides normal protocol behaviour, the analysis focuses on the fault-handling properties of RTnet, in particular recovery after packet loss. Both qualitative and quantitative properties are presented, together with the verification results and conclusions about the robustness of RTnet.

We give timed automaton models for a class of Programmable Logic Controller (PLC) applications, that are programmed in a simple fragment of the language Instruction Lists as defined in the standard IEC 1131-3. Two different approaches for modelling timers are suggested, that lead to two different timed automaton models. The purpose of this work is to provide a basis for verification and testing of real-time properties of PLC applications. Our work can be seen in broader context: it is a contribution to methodical development of provably correct programs. Even if the present PLC hardware will be substituted by e.g. Personal Computers, with a similar operation mode, the development and verification method will remain useful.