VLDB 2026 Research / reviewers in the wild / expert
Gyula A. Magó
dblp:m/GAMago · also Gyula Magó
· DBLP profile ↗
4ranked-venue papers
2as first author
0since 2021 · last 1979
—ORCID · none
Domains — the database's venue-derived domains; a paper can count in several
Systems, architecture and hardware · 2 · 2 first-authorComputer networks · 1Theory of computation · 1
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Computer architecture, parallel and distributed computing, and storage systems
2 papers |
Integrated circuit design · 89% Electronic design automation · 11% | |
| Theoretical computer science
1 paper |
Automata and formal languages · 100% |
Topics — the 5 heaviest of 5, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
Integrated circuit design › digital circuit design
sequential circuit design |
0.0 | 1 | 1973 | Monotone Functions in Sequential Circuits · IEEE Trans. Computers 1973 |
Automata and formal languages
context-free languages |
0.0 | 1 | 1972 | Algebraic Parsing Techniques for Context-Free Languages · ICALP 1972 |
Integrated circuit design
asynchronous circuit design |
0.0 | 1 | 1971 | Realization Methods for Asynchronous Sequential Circuits · IEEE Trans. Computers 1971 |
Integrated circuit design › digital circuit design › sequential circuit design
asynchronous sequential circuits |
0.0 | 1 | 1971 | Realization Methods for Asynchronous Sequential Circuits · IEEE Trans. Computers 1971 |
Electronic design automation › logic synthesis
state assignment |
0.0 | 1 | 1973 | Monotone Functions in Sequential Circuits · IEEE Trans. Computers 1973 |
Methods — techniques the papers use, named apart from their topics
(i,j) completely separating system · 0.0built-in delay utilization · 0.0
| Year | Publication | Venue | Position |
|---|---|---|---|
| 1979 | Minimizing maximum flows in linear graphsabstractAbstract We define a linear graph to be a connected acyclic graph each of whose nodes is of degree one or two. We consider a flow problem in linear graphs in which a commodity flows from source nodes to sink nodes. Each source node has a specified value denoting an amount of a commodity to be disposed of and each sink node has a specified capacity denoting the maximum amount of the commodity it can absorb; edges are capable of carrying an arbitrary quantity of the commodity. A solution is a set of flows which transports the commodity from all source nodes to sink nodes without overfilling any sink. A solution is defined to be optimal if it is minimax, that is, the largest flow along any edge is as small as possible. We describe 0(n2) and 0(n) algorithms for finding optimal solutions. Donald F. Stanat, Gyula A. Magó |
Networks | 2 |
| 1973 | Monotone Functions in Sequential CircuitsabstractThis paper is concerned with the problem of realizing an arbitrary syndconous or asynchronous sequential machine using only monotone AMR (or decreasing) switching functions. It has been found that h ion always exist, that in the asynchronous case only nomal fundamental mode flow tables are considered. Univesl state assignmments resulting in monotone inceasing (or next-state funtions are characterized using the concept of an (i,j) completely separating system. Gyula A. Magó |
IEEE Trans. Computers | 1 |
| 1972 | Algebraic Parsing Techniques for Context-Free Languages
Stephen F. Weiss, Gyula A. Magó, Donald F. Stanat |
ICALP | 2 |
| 1971 | Realization Methods for Asynchronous Sequential CircuitsabstractThis paper gives a unified approach for describing various systematic ways of using built-in delays in normal fundamental mode circuits. The transition of the circuit from one total stable state to another is characterized by the constraints imposed upon the next-state functions, and the realization method is characterized by the conditions under which these constraints can be satisfied simultaneously. Gyula A. Magó |
IEEE Trans. Computers | 1 |