VLDB 2026 Research / reviewers in the wild / expert
Amir Pnueli
dblp:p/AmirPnueli
· DBLP profile ↗
186ranked-venue papers
46as first author
0since 2021 · last 2019
—ORCID · none
Domains — the database's venue-derived domains; a paper can count in several
Theory of computation · 117 · 30 first-authorSoftware engineering, systems software and programming languages · 76 · 19 first-authorSystems, architecture and hardware · 11 · 5 first-authorApplied, interdisciplinary, general and emerging computing · 7 · 1 first-authorComputer networks · 2Artificial intelligence and machine learning · 1 · 1 first-authorGraphics, computer vision, multimedia, augmented reality and games · 1Human-computer interaction and ubiquitous computing · 1
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Theoretical computer science
85 papers |
Logic in computer science · 41% Automated reasoning and model checking · 39% Computational complexity · 6% | |
| Software engineering, system software, and programming languages
31 papers |
Program verification · 39% Compilers and program optimization · 27% Concurrent programming · 19% | |
| Computer architecture, parallel and distributed computing, and storage systems
8 papers |
Electronic design automation · 44% Embedded and real-time systems · 27% Processor architecture and microarchitecture · 24% |
Topics — the 30 heaviest of 165, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
Logic in computer science
temporal logic |
0.5 | 28 | 2019 | From Real-time Logic to Timed Automata · J. ACM 2019 Two Decades of Temporal Logic: Achievements and Challenges (Abstract) · FOCS 1997 Once and For All · LICS 1995 |
Logic in computer science › temporal logic
real-time temporal logic |
0.4 | 4 | 2019 | From Real-time Logic to Timed Automata · J. ACM 2019 Temporal Proof Methodologies for Real-time Systems · POPL 1991 Explicit Clock Temporal Logic · LICS 1990 |
Automated reasoning and model checking
hybrid systems |
0.2 | 2 | 2012 | Low dimensional hybrid systems - decidable, undecidable, don't know · Inf. Comput. 2012 Effective synthesis of switching controllers for linear systems · Proc. IEEE 2000 |
Automated reasoning and model checking
model checking |
0.2 | 4 | 2008 | Discriminative Model Checking · CAV 2008 PSL Model Checking and Run-Time Verification Via Testers · FM 2006 Once and For All · LICS 1995 |
Computational complexity
decidability |
0.1 | 5 | 2012 | Low dimensional hybrid systems - decidable, undecidable, don't know · Inf. Comput. 2012 Propositional Dynamic Logic of Context-Free Programs · FOCS 1981 On the Synthesis of a Reactive Module · POPL 1989 |
Automated reasoning and model checking
verification algorithms |
0.1 | 2 | 2010 | Jtlv: A Framework for Developing Verification Algorithms · CAV 2010 A Platform for Combining Deductive with Algorithmic Verification · CAV 1996 |
Electronic design automation › hardware verification and test › formal verification
timed automata |
0.1 | 1 | 2019 | From Real-time Logic to Timed Automata · J. ACM 2019 |
Automated reasoning and model checking
parameterized verification |
0.1 | 3 | 2002 | Liveness with (0, 1, infty)-Counter Abstraction · CAV 2002 Parameterized Verification with Automatically Computed Inductive Assertions · CAV 2001 Liveness and Acceleration in Parameterized Verification · CAV 2000 |
Automated reasoning and model checking
reactive synthesis |
0.1 | 3 | 2007 | On Synthesizing Controllers from Bounded-Response Properties · CAV 2007 Distributed Reactive Systems Are Hard to Synthesize · FOCS 1990 On the Synthesis of a Reactive Module · POPL 1989 |
Compilers and program optimization
compiler validation |
0.1 | 1 | 2008 | CoVaC: Compiler Validation by Program Analysis of the Cross-Product · FM 2008 |
Concurrent programming
memory models |
0.1 | 1 | 2008 | Mechanical Verification of Transactional Memories with Non-transactional Memory Accesses · CAV 2008 |
Compilers and program optimization › verified compilation
translation validation |
0.1 | 2 | 2005 | TVOC: A Translation Validator for Optimizing Compilers · CAV 2005 Translation Validation for Synchronous Languages · ICALP 1998 |
Automated reasoning and model checking
controller synthesis |
0.1 | 1 | 2007 | On Synthesizing Controllers from Bounded-Response Properties · CAV 2007 |
Automated reasoning and model checking › model checking
symbolic model checking |
0.1 | 3 | 2001 | Sticks and stones: a coding scheme for parameterized verification · PODC 2001 Symbolic Model Checking with Rich ssertional Languages · CAV 1997 Some Progress in the Symbolic Verification of Timed Automata · CAV 1997 |
Program verification › dynamic verification
runtime verification |
0.1 | 1 | 2006 | PSL Model Checking and Run-Time Verification Via Testers · FM 2006 |
Distributed computing theory › distributed algorithms
distributed protocols |
0.1 | 1 | 2006 | Invisible Safety of Distributed Protocols · ICALP (2) 2006 |
Algorithmic game theory and mechanism design
game solving |
0.1 | 1 | 2006 | Faster Solutions of Rabin and Streett Games · LICS 2006 |
Logic in computer science › temporal logic
safety properties |
0.1 | 1 | 2006 | Invisible Safety of Distributed Protocols · ICALP (2) 2006 |
Logic in computer science
concurrency theory |
0.1 | 2 | 2005 | Bridging the gap between fair simulation and trace inclusion · Inf. Comput. 2005 Linear and Branching Structures in the Semantics and Logics of Reactive Systems · ICALP 1985 |
Automated reasoning and model checking
decision procedures |
0.1 | 3 | 2004 | Range Allocation for Separation Logic · CAV 2004 Explicit Clock Temporal Logic · LICS 1990 The Temporal Logic of Branching Time · POPL 1981 |
Graph algorithms and graph theory
graph algorithms |
0.0 | 1 | 2004 | Range Allocation for Separation Logic · CAV 2004 |
Automated reasoning and model checking
satisfiability modulo theories |
0.0 | 1 | 2004 | Range Allocation for Separation Logic · CAV 2004 |
Logic in computer science › program logic
separation logic |
0.0 | 1 | 2004 | Range Allocation for Separation Logic · CAV 2004 |
Automated reasoning and model checking › program verification › verification of concurrent systems
fair simulation |
0.0 | 1 | 2003 | Bridging the Gap between Fair Simulation and Trace Inclusion · CAV 2003 |
Distributed computing theory
simulation relations |
0.0 | 1 | 2003 | Bridging the Gap between Fair Simulation and Trace Inclusion · CAV 2003 |
Automated reasoning and model checking › automata-based verification
trace containment |
0.0 | 1 | 2003 | Bridging the Gap between Fair Simulation and Trace Inclusion · CAV 2003 |
Logic in computer science
finite model theory |
0.0 | 2 | 2002 | The Small Model Property: How Small Can It Be? · Inf. Comput. 2002 Finite Models for Deterministic Propositional Dynamic Logic · ICALP 1981 |
Automated reasoning and model checking
reachability |
0.0 | 2 | 2000 | Effective synthesis of switching controllers for linear systems · Proc. IEEE 2000 Reachability Analysis of Planar Multi-limear Systems · CAV 1993 |
Automated reasoning and model checking › abstraction
counter abstraction |
0.0 | 1 | 2002 | Liveness with (0, 1, infty)-Counter Abstraction · CAV 2002 |
Automated reasoning and model checking › temporal logic verification
liveness verification |
0.0 | 1 | 2002 | Liveness with (0, 1, infty)-Counter Abstraction · CAV 2002 |
Methods — techniques the papers use, named apart from their topics
temporal testers · 0.8compositional translation · 0.8theorem proving · 0.1program analysis · 0.1mechanical verification · 0.1symbolic model checking · 0.1synthesis from temporal specifications · 0.1ranking functions · 0.1fixpoint characterization · 0.1trace inclusion · 0.1fair simulation · 0.1symbolic enumeration · 0.0range allocation · 0.0regular expressions · 0.0binary search · 0.0backward scheduling · 0.0WS1S · 0.0controller synthesis · 0.0
| Year | Publication | Venue | Position |
|---|---|---|---|
| 2019 | From Real-time Logic to Timed AutomataabstractWe show how to construct temporal testers for the logic MITL, a prominent linear-time logic for real-time systems. A temporal tester is a transducer that inputs a signal holding the Boolean value of atomic propositions and outputs the truth value of a formula along time. Here we consider testers over continuous-time Boolean signals that use clock variables to enforce duration constraints, as in timed automata. We first rewrite the MITL formula into a “simple” formula using a limited set of temporal modalities. We then build testers for these specific modalities and show how to compose testers for simple formulae into complex ones. Temporal testers can be turned into acceptors, yielding a compositional translation from MITL to timed automata. This construction is much simpler than previously known and remains asymptotically optimal. It supports both past and future operators and can easily be extended. Thomas Ferrère, Oded Maler, Dejan Nickovic, Amir Pnueli |
J. ACM | 4 |
| 2012 | Effective Synthesis of Asynchronous Systems from GR(1) Specifications
Uri Klein, Nir Piterman, Amir Pnueli |
VMCAI | 3 |
| 2012 | Low dimensional hybrid systems - decidable, undecidable, don't know
Eugene Asarin, Venkatesh Mysore, Amir Pnueli, Gerardo Schneider |
Inf. Comput. | 3 |
| 2012 | Verification of multi-linked heaps
Ittai Balaban, Amir Pnueli, Yaniv Sa'ar, Lenore D. Zuck |
J. Comput. Syst. Sci. | 2 |
| 2012 | Synthesis of Reactive(1) designs
Roderick Bloem, Barbara Jobstmann, Nir Piterman, Amir Pnueli, Yaniv Sa'ar |
J. Comput. Syst. Sci. | 4 |
| 2012 | Once and for all
Orna Kupferman, Amir Pnueli, Moshe Y. Vardi |
J. Comput. Syst. Sci. | 2 |
| 2010 | Jtlv: A Framework for Developing Verification Algorithms
Amir Pnueli, Yaniv Sa'ar, Lenore D. Zuck |
CAV | 1 |
| 2009 | Controller Synthesis from LSC Requirements
Hillel Kugler, Cory Plock, Amir Pnueli |
FASE | 3 |
| 2009 | Synthesis of programs from temporal property specificationsabstractThe paper investigates a development process for reactive programs, in which the program is automatically generated (synthesized) from a high-level temporal specification. The method is based on previous results that proposed a similar synthesis method for the automatic construction of hardware designs from their temporal specifications. Thus, the work reported here can be viewed as a generalization of existing methods for the synthesis of synchronous reactive systems into the synthesis of asynchronous systems. In the synchronous case it was possible to identify a restricted subclass of formulas and present an algorithm that solves the synthesis problem for these restricted specifications in polynomial time. Here the results are less definitive in the sense that we can offer some heuristics that may provide polynomial-time solutions only in some of the cases. Amir Pnueli, Uri Klein |
MEMOCODE | 1 |
| 2008 | Using Abstraction to Verify Arbitrary Temporal PropertiesabstractSummary form only given. It is a known fact that finitary state abstraction methods (i.e. methods in which the abstract domain is finite), such as predicate abstraction, are inadequate for verifying general liveness properties or even termination of sequential programs. In this talk we will present an abstraction approach called ranking abstraction which is sound and complete for verifying all temporally specified properties, including all liveness properties. We will start by presenting a general simple framework for state abstraction emphasizing that, in order to get soundness, it is necessary to apply an over-approximating abstraction to the system and an under-approximating abstraction to the (temporal) property. We show that finitary version of this abstraction are complete for verifying all safety properties. We also show examples of simple programs whose termination provably cannot be established by finitary abstraction. We then consider abstraction approaches to the verification of deadlock freedom, presenting some sufficient conditions guaranteeing that deadlock freedom is inherited from the concrete to the abstract. Finally, we introduce the method of ranking abstraction and illustrate its application to the verification of termination and more general liveness properties. In this presentation we emphasize the similarity between predicate abstraction and its extension into ranking abstraction. In particular, the fact that the user does not have to provide a full ranking function but only to specify the ingredients from which such a function can be constructed. We also sketch how abstraction refinement can be applied to ranking abstraction, thus opening the way to a CEGAR-like methodology. Time permitting, we will present a brief comparison between ranking abstraction and the methods of transition abstraction developed by Podelski, Rybalchenko, and Cook which underly the Terminator system. The talk is based on results obtained through joint research with I. Balaban, Y. Kesten, and L.D. Zuck. Amir Pnueli |
APSEC | 1 |
| 2008 | Mechanical Verification of Transactional Memories with Non-transactional Memory Accesses
Ariel Cohen 0002, Amir Pnueli, Lenore D. Zuck |
CAV | 2 |
| 2008 | Discriminative Model Checking
Peter Niebert, Doron A. Peled, Amir Pnueli |
CAV | 3 |
| 2008 | CoVaC: Compiler Validation by Program Analysis of the Cross-Product
Anna Zaks, Amir Pnueli |
FM | 2 |
| 2008 | Program analysis for compiler validationabstractTranslation Validation is an approach of ensuring compilation correctness in which each compiler run is followed by a validation pass that proves that the target code produced by the compiler is a correct translation (implementation) of the source code. It has been previously shown that the problem of translation validation can be reduced to checking if a single system - the corss-product of the source and target, satisfies a specific property. In this paper, we show how to adapt the existing program analysis techniques in the setting of translation validation. In addition, we present a novel invariant generation algorithm which strengthens our analysis when the input programs contain dynamically allocated data structures. Finally, we report on the prototype tool that applies the developed methodology to verification of the LLVM compiler. The tool handles many of the classical intraprocedural compiler optimizations such as constant folding, reassociation, common subexpression elimination, code motion, dead code elimination, and others. Anna Zaks, Amir Pnueli |
PASTE | 2 |
| 2008 | All You Need Is Compassion
Amir Pnueli, Yaniv Sa'ar |
VMCAI | 1 |
| 2007 | On Synthesizing Controllers from Bounded-Response Properties
Oded Maler, Dejan Nickovic, Amir Pnueli |
CAV | 3 |
| 2007 | Interactive presentation: Automatic hardware synthesis from specifications: a case study
Roderick Bloem, Stefan J. Galler, Barbara Jobstmann, Nir Piterman, Amir Pnueli, Martin Weiglhofer |
DATE | 5 |
| 2007 | Verifying Correctness of Transactional MemoriesabstractWe show how to verify the correctness of transactional memory implementations with a model checker. We show how to specify transactional memory in terms of the admissible interchange of transaction operations, and give proof rules for showing that an implementation satisfies this specification. This notion of an admissible interchange is a key to our ability to use a model checker, and lets us capture the various notions of transaction conflict as characterized by Scott. We demonstrate our work using the TLC model checker to verify several well-known implementations described abstractly in the TLA+ specification language. Ariel Cohen 0002, John W. O'Leary, Amir Pnueli, Mark R. Tuttle, Lenore D. Zuck |
FMCAD | 3 |
| 2007 | "Don't Care" Modeling: A Logical Framework for Developing Predictive System Models
Hillel Kugler, Amir Pnueli, Michael J. Stern, E. Jane Albert Hubbard |
TACAS | 2 |
| 2007 | Shape Analysis of Single-Parent Heaps
Ittai Balaban, Amir Pnueli, Lenore D. Zuck |
VMCAI | 2 |
| 2006 | PSL Model Checking and Run-Time Verification Via Testers
Amir Pnueli, Aleksandr Zaks |
FM | 1 |
| 2006 | Liveness by Invisible Invariants
Yi Fang 0001, Kenneth L. McMillan, Amir Pnueli, Lenore D. Zuck |
FORTE | 3 |
| 2006 | Invisible Safety of Distributed Protocols
Ittai Balaban, Amir Pnueli, Lenore D. Zuck |
ICALP (2) | 2 |
| 2006 | Faster Solutions of Rabin and Streett GamesabstractIn this paper we improve the complexity of solving Rabin and Streett games to approximately the square root of previous bounds. We introduce direct Rabin and Streett ranking that are a sound and complete way to characterize the winning sets in the respective games. By computing directly and explicitly the ranking we can solve such games in time O(mnk+1kk!) and space O(nk) for Rabin and O(nkk!) for Streett where n is the number of states, m the number of transitions, and k the number of pairs in the winning condition. In order to prove completeness of the ranking method we give a recursive fixpoint characterization of the winning regions in these games. We then show that by keeping intermediate values during the fixpoint evaluation, we can solve such games symbolically in time O(nk+1k!) and space O(nk+1k!). These results improve on the current bounds of O(mn2kk!) time in the case of direct (symbolic) solution or O(m(nk2k!)k) in the case of reduction to parity games Nir Piterman, Amir Pnueli |
LICS | 2 |
| 2006 | Ranking Abstraction of Recursive Programs
Ittai Balaban, Ariel Cohen 0002, Amir Pnueli |
VMCAI | 3 |
| 2006 | Synthesis of Reactive(1) Designs
Nir Piterman, Amir Pnueli, Yaniv Sa'ar |
VMCAI | 2 |
| 2006 | Model Checking with Strong Fairness
Yonit Kesten, Amir Pnueli, Li-on Raviv, Elad Shahar |
Formal Methods Syst. Des. | 2 |
| 2006 | Liveness with invisible ranking
Yi Fang 0001, Nir Piterman, Amir Pnueli, Lenore D. Zuck |
Int. J. Softw. Tools Technol. Transf. | 3 |
| 2005 | Ranking Abstraction as a Companion to Predicate Abstraction,
Amir Pnueli |
ATVA | 1 |
| 2005 | IIV: An Invisible Invariant Verifier
Ittai Balaban, Yi Fang 0001, Amir Pnueli, Lenore D. Zuck |
CAV | 3 |
| 2005 | TVOC: A Translation Validator for Optimizing Compilers
Clark W. Barrett, Yi Fang 0001, Benjamin Goldberg 0001, Ying Hu 0003, Amir Pnueli, Lenore D. Zuck |
CAV | 5 |
| 2005 | Ranking Abstraction as Companion to Predicate Abstraction
Ittai Balaban, Amir Pnueli, Lenore D. Zuck |
FORTE | 2 |
| 2005 | Refining the Undecidability Frontier of Hybrid Automata
Venkatesh Mysore, Amir Pnueli |
FSTTCS | 2 |
| 2005 | Temporal Logic for Scenario-Based Specifications
Hillel Kugler, David Harel, Amir Pnueli, Yves Bontemps |
TACAS | 3 |
| 2005 | Separating Fairness and Well-Foundedness for the Analysis of Fair Discrete Systems
Amir Pnueli, Andreas Podelski, Andrey Rybalchenko |
TACAS | 1 |
| 2005 | Shape Analysis by Predicate Abstraction
Ittai Balaban, Amir Pnueli, Lenore D. Zuck |
VMCAI | 2 |
| 2005 | Abstraction for Liveness
Amir Pnueli |
VMCAI | 1 |
| 2005 | Translation and Run-Time Validation of Loop Transformations
Lenore D. Zuck, Amir Pnueli, Benjamin Goldberg 0001, Clark W. Barrett, Yi Fang 0001, Ying Hu 0003 |
Formal Methods Syst. Des. | 2 |
| 2005 | Bridging the gap between fair simulation and trace inclusion
Yonit Kesten, Nir Piterman, Amir Pnueli |
Inf. Comput. | 3 |
| 2005 | A discrete-time UML semantics for concurrency and communication in safety-critical applications
Werner Damm, Bernhard Josko, Amir Pnueli, Anjelika Votintseva |
Sci. Comput. Program. | 3 |
| 2005 | A compositional approach to CTL* verification
Yonit Kesten, Amir Pnueli |
Theor. Comput. Sci. | 2 |
| 2004 | Validating the Translation of an Industrial Optimizing Compiler
I. Gordin, Raya Leviathan, Amir Pnueli |
ATVA | 3 |
| 2004 | Range Allocation for Separation LogicabstractSeparation Logic consists of a Boolean combination of predicates of the form v i ≥ v j + c where c is a constant and v i ,v j are variables of some ordered infinite type like real or integer. Any equality or inequality can be expressed in this logic. We propose a decision procedure for Separation Logic based on allocating small domains (ranges) to the formula’s variables that are sufficient for preserving satisfiability. Given a Separation Logic formula φ, our procedure constructs the inequalities graph of φ, based on φ’s predicates. This graph represents an abstraction of the formula, as there are many formulas with the same set of predicates. Our procedure then analyzes this graph and allocates a range to each variable that is adequate for all of these formulas. This approach of finding small finite ranges and enumerating them symbolically is both theoretically and empirically more efficient than methods based on case-splitting or reduction to Propositional Logic. Experimental results show that the state-space (that is, the number of assignments that need to be enumerated) allocated by our procedure is frequently exponentially smaller than previous methods. Muralidhar Talupur, Nishant Sinha 0001, Ofer Strichman, Amir Pnueli |
CAV | 4 |
| 2004 | On Recognizable Timed Languages
Oded Maler, Amir Pnueli |
FoSSaCS | 2 |
| 2004 | Liveness with Incomprehensible Ranking
Yi Fang 0001, Nir Piterman, Amir Pnueli, Lenore D. Zuck |
TACAS | 3 |
| 2004 | Liveness with Invisible Ranking
Yi Fang 0001, Nir Piterman, Amir Pnueli, Lenore D. Zuck |
VMCAI | 3 |
| 2004 | Model checking and abstraction to the aid of parameterized systems (a survey)
Lenore D. Zuck, Amir Pnueli |
Comput. Lang. Syst. Struct. | 2 |
| 2003 | Bridging the Gap between Fair Simulation and Trace Inclusion
Yonit Kesten, Nir Piterman, Amir Pnueli |
CAV | 3 |
| 2003 | Parameterized Verification by Probabilistic Abstraction
Tamarah Arons, Amir Pnueli, Lenore D. Zuck |
FoSSaCS | 2 |
| 2003 | Model-Checking and Abstraction to the Aid of Parameterized Systems
Amir Pnueli, Lenore D. Zuck |
VMCAI | 1 |
| 2003 | Erratum ("The small model property: how small can it be?" Volume 178, Number 1 [2002], pages 279-293)
Amir Pnueli, Yoav Rodeh, Ofer Strichman, Michael Siegel |
Inf. Comput. | 1 |
| 2002 | Validating software pipelining optimizationsabstractThe paper presents a method for translation validation of a specific optimization, software pipelining optimization, used to increase the instruction level parallelism in EPIC type of architectures. Using a methodology as in [15] to establish simulation relation between source and target based on computational induction, we describe an algorithm that automatically produces a set of decidable proof obligations. The paper also describes SPV, a prototype translation validator that automatically produces verification conditions for software pipelining optimizations of the SGI Pro-64 compiler. These verification conditions are further checked automatically by the CVC [12] checker. Raya Leviathan, Amir Pnueli |
CASES | 2 |
| 2002 | Liveness with (0, 1, infty)-Counter Abstraction
Amir Pnueli, Jessie Xu, Lenore D. Zuck |
CAV | 1 |
| 2002 | Network Invariants in Action
Yonit Kesten, Amir Pnueli, Elad Shahar, Lenore D. Zuck |
CONCUR | 2 |
| 2002 | A Deductive Proof System for CTL
Amir Pnueli, Yonit Kesten |
CONCUR | 1 |
| 2002 | Embedded Systems: Challenges in Specification and Verification
Amir Pnueli |
EMSOFT | 1 |
| 2002 | Smart Play-out of Behavioral Requirements
David Harel, Hillel Kugler, Rami Marelly, Amir Pnueli |
FMCAD | 4 |
| 2002 | The Small Model Property: How Small Can It Be?
Amir Pnueli, Yoav Rodeh, Ofer Strichman, Michael Siegel |
Inf. Comput. | 1 |
| 2002 | Complete Proof System for QPTLabstractThe paper presents an axiomatic system for quantified propositional temporal logic (QPTL), which is propositional temporal logic equipped with quantification over propositions (Boolean variables). The advantages of this extended temporal logic is that its expressive power is strictly higher than that of the unquantified version (PTL) and is equal to that of S1S, as well as that of ω‐automata. Another important application of QPTL is its use for formulating and verifying refinement relations between reactive systems. In fact, the completeness proof is based on the reduction of a QPTL formula into a Büchi automaton, and performing equivalence transformations on this automaton, formally justifying these transformations as a bi‐directional refinement. Yonit Kesten, Amir Pnueli |
J. Log. Comput. | 2 |
| 2001 | Parameterized Verification with Automatically Computed Inductive Assertions
Tamarah Arons, Amir Pnueli, Sitvanit Ruah, Jiazhao Xu, Lenore D. Zuck |
CAV | 2 |
| 2001 | Beyond Regular Model Checking
Dana Fisman, Amir Pnueli |
FSTTCS | 2 |
| 2001 | From Falsification to Verification
Doron A. Peled, Amir Pnueli, Lenore D. Zuck |
FSTTCS | 2 |
| 2001 | Range Allocation for Equivalence Logic
Amir Pnueli, Yoav Rodeh, Ofer Strichman |
FSTTCS | 1 |
| 2001 | Sticks and stones: a coding scheme for parameterized verificationabstractWe consider the problem of Uniform Algorithmic Verification of Parameterized Systems, which requires establishing in a single verification effort the correctness of a parameterized family of systems for any value of the parameter. As has been observed by several researchers, using regular expressions or equivalent formalisms (e.g. WS1S) as assertional language, we can perform symbolic model checking of systems of unbounded number of states. Amir Pnueli |
PODC | 1 |
| 2001 | Automatic Deductive Verification with Invisible Invariants
Amir Pnueli, Sitvanit Ruah, Lenore D. Zuck |
TACAS | 1 |
| 2001 | Verification by Augmented Abstraction: The Automata-Theoretic View
Yonit Kesten, Amir Pnueli, Moshe Y. Vardi |
J. Comput. Syst. Sci. | 2 |
| 2001 | Symbolic model checking with rich assertional languages
Yonit Kesten, Oded Maler, Monica Marcus, Amir Pnueli, Elad Shahar |
Theor. Comput. Sci. | 4 |
| 2001 | Scheduling time-constrained instructions on pipelined processorsabstractIn this work we investigate the problem of scheduling instructions on idealized microprocessors with multiple pipelines, in the presence of precedence constraints, release-times, deadlines, and latency constraints. A latency of l ij specifies that there must be at least l ij time-steps between the completion time of instruction i and the start time of instruction j . A latency of l ij =−1 can be used to specify that j may be scheduled concurrently with i but not earlier. We present a generic algorithm that runs in O ( n 2 log n α( n )+ ne ) time, given n instructions and e edges in the precedence DAG, where α( n ) is the functional inverse of the Ackermann function. Our algorithm can be used to construct feasible schedules for various classes of instances, including instances with the following configurations: (1) one pipeline, with individual release-times and deadlines and where the latencies between instructions are restricted to 0 and 1; (2) m pipelines, with individual release-times and deadlines, and monotone-interval order precedences; (3) two pipelines with latencies of −1 or 0, and release-times and deadlines; (4) one pipeline, latencies of 0 or 1 and individual processing times that are at least one; (5) m pipelines, intree precedences, constant latencies, and deadlines; (6) m pipelines, outtree precedences, constant latencies, and release-times. For instances with deadlines, optimal schedules that minimize the maximal tardiness can be constructed using binary search, in O (log n ) iterations of our algorithm. We obtain our results using backward scheduling, a very general relaxation method, which extends, unifies, and clarifies many previous results on instruction scheduling for pipelined and parallel machines. Allen Leung, Krishna V. Palem, Amir Pnueli |
ACM Trans. Program. Lang. Syst. | 3 |
| 2000 | Rigorous development of embedded systemsabstractNo abstract available. Amir Pnueli |
CASES | 1 |
| 2000 | Keynote Address: Abstraction, Composition, Symmetry, and a Little Deduction: The Remedies to State Explosion
Amir Pnueli |
CAV | 1 |
| 2000 | Liveness and Acceleration in Parameterized Verification
Amir Pnueli, Elad Shahar |
CAV | 1 |
| 2000 | Formal Verification of the Ricart-Agrawala Algorithm
Ekaterina Sedletsky, Amir Pnueli, Mordechai Ben-Ari |
FSTTCS | 2 |
| 2000 | A Comparison of Two Verification Methods for Speculative Instruction Execution
Tamarah Arons, Amir Pnueli |
TACAS | 2 |
| 2000 | Verification of Clocked and Hybrid Systems
Yonit Kesten, Zohar Manna, Amir Pnueli |
Acta Informatica | 3 |
| 2000 | Verification by Augmented Finitary Abstraction
Yonit Kesten, Amir Pnueli |
Inf. Comput. | 2 |
| 2000 | Effective synthesis of switching controllers for linear systemsabstractIn this paper, we suggest a novel methodology for synthesizing switching controllers for continuous and hybrid systems whose dynamics are defined by linear differential equations. We formulate the synthesis problem as finding the conditions upon which a controller should switch the behavior of the system from one "mode" to another in order to avoid a set of bad states and propose an abstract algorithm that solves the problem by an iterative computation of reachable states. We have implemented a concrete version of the algorithm, which uses a new approximation scheme for reachability analysis of linear systems. Eugene Asarin, Olivier Bournez, Thao Dang 0001, Oded Maler, Amir Pnueli |
Proc. IEEE | 5 |
| 2000 | Control and Data Abstraction: The Cornerstones of Practical Formal Verification
Yonit Kesten, Amir Pnueli |
Int. J. Softw. Tools Technol. Transf. | 2 |
| 1999 | Deciding Equality Formulas by Small Domains Instantiations
Amir Pnueli, Yoav Rodeh, Ofer Strichman, Michael Siegel |
CAV | 1 |
| 1999 | A Framework for Scheduler SynthesisabstractWe present a framework integrating specification and scheduler generation for real time systems. In a first step, the system, which can include arbitrarily designed tasks (cyclic or sporadic, with or without precedence constraints, any number of resources and CPUs) is specified as a timed Petri net. In a second step, our tool generates the most general non preemptive online scheduler for the specification, using a controller synthesis technique. Karine Altisen, Gregor Gößler, Amir Pnueli, Joseph Sifakis, Stavros Tripakis, Sergio Yovine |
RTSS | 3 |
| 1999 | Proving Refinement Using Transduction
Bengt Jonsson 0001, Amir Pnueli, Camilla Rump |
Distributed Comput. | 2 |
| 1999 | Decidable Integration Graphs
Yonit Kesten, Amir Pnueli, Joseph Sifakis, Sergio Yovine |
Inf. Comput. | 2 |
| 1998 | Deductive vs. Model-Theoretic Approaches to Formal Verification (Abstract of Invited Talk)
Amir Pnueli |
CADE | 1 |
| 1998 | On Discretization of Delays in Timed Automata and Digital Circuits
Eugene Asarin, Oded Maler, Amir Pnueli |
CONCUR | 3 |
| 1998 | Herbrand Automata for Hardware Verification
Werner Damm, Amir Pnueli, Sitvanit Ruah |
CONCUR | 2 |
| 1998 | Verification of Data-Insensitive CIrcuits: An In-Order-Retirement Case Study
Amir Pnueli, Tamarah Arons |
FMCAD | 1 |
| 1998 | Algorithmic Verification of Linear Temporal Logic Specifications
Yonit Kesten, Amir Pnueli, Li-on Raviv |
ICALP | 2 |
| 1998 | Translation Validation for Synchronous Languages
Amir Pnueli, Ofer Strichman, Michael Siegel |
ICALP | 1 |
| 1998 | Modularization and Abstraction: The Keys to Practical Formal Verification
Yonit Kesten, Amir Pnueli |
MFCS | 2 |
| 1998 | Translation Validation
Amir Pnueli, Michael Siegel, Eli Singerman |
TACAS | 1 |
| 1998 | The Code Validation Tool CVT: Automatic Verification of a Compilation Process
Amir Pnueli, Ofer Strichman, Michael Siegel |
Int. J. Softw. Tools Technol. Transf. | 1 |
| 1997 | Some Progress in the Symbolic Verification of Timed Automata
Marius Bozga, Oded Maler, Amir Pnueli, Sergio Yovine |
CAV | 3 |
| 1997 | Symbolic Model Checking with Rich ssertional Languages
Yonit Kesten, Oded Maler, Monica Marcus, Amir Pnueli, Elad Shahar |
CAV | 4 |
| 1997 | Two Decades of Temporal Logic: Achievements and Challenges (Abstract)abstractAbstract This year (1997) marks the 20th anniversary of the introduction of Temporal Logic (TL) into Computer Science as a language proposed for the specification and verification of reactive systems. The talk will present a personal view of the main contributions and achievements of TL over the last two decades emphasizing the recent, increase of acceptance and adoption of the temporal methodology by industry. We will then proceed to identify future challenges and directions that may extend the applicability of TL to wider classes of applications and the treatment of ever larger systems. We start by identifying the class of reactive systems for whose specification and verification TL has proved to be a most natural and effective language. These are systems whose role is to maintain an ongoing interaction with their environment, rather than produce a final result on termination. Most, embedded systems which control an external physical environment be-long to this important class. Such systems must be specified and analyzed in terms of their behavior. Amir Pnueli |
FOCS | 1 |
| 1997 | Verification Engineering: A Future Profession (A. M. Turing Award Lecture)abstractNo abstract available. Amir Pnueli |
PODC | 1 |
| 1996 | A Platform for Combining Deductive with Algorithmic Verification
Amir Pnueli, Elad Shahar |
CAV | 1 |
| 1995 | A Complete Proof Systems for QPTLabstractThe paper presents an axiomatic system for quantified propositional temporal logic (QPTL), which is propositional temporal logic equipped with quantification over propositions (boolean variables). The advantages of this extended temporal logic is that its expressive power is strictly higher than that of the unquantified version (PTL) and is equal to that of SIS, as well as that of /spl omega/-automata. Another important application of QPTL is its use for formulating and verifying refinement relations between reactive systems. In fact, the completeness proof is based on the reduction of a QPTL formula into a Buchi automaton, and performing equivalence transformations on this automata, formally justifying these transformations. Yonit Kesten, Amir Pnueli |
LICS | 2 |
| 1995 | Once and For AllabstractIt has long been known that past-time operators add no expressive power to linear temporal logics. In this paper, we consider the extension of branching temporal logics with past-time operators. Two possible views regarding the nature of past in a branching-time model induce two different such extensions. In the first view, past is branching and each moment in time may have several possible futures and several possible pasts. In the second view, past is linear and each moment in time may have several possible futures and a unique past. Both views assume that past is finite. We discuss the practice of these extensions as specification languages, characterize their expressive power, and examine the complexity of their model-checking and satisfiability problems. Orna Kupferman, Amir Pnueli |
LICS | 2 |
| 1995 | On the Synthesis of Discrete Controllers for Timed Systems (An Extended Abstract)
Oded Maler, Amir Pnueli, Joseph Sifakis |
STACS | 2 |
| 1995 | On the Learnability of Infinitary Regular Sets
Oded Maler, Amir Pnueli |
Inf. Comput. | 2 |
| 1995 | Reachability Analysis of Dynamical Systems Having Piecewise-Constant Derivatives
Eugene Asarin, Oded Maler, Amir Pnueli |
Theor. Comput. Sci. | 3 |
| 1994 | Compositional Verification of Real-Time SystemsabstractPresents a compositional proof system for the verification of real-time systems. Real-time systems are modeled as timed transition modules, which explicitly model interaction with the environment and may be combined using composition operators. Composition rules are devised such that the correctness of a system may be determined from the correctness of its components. These proof rules are demonstrated on Fischer's mutual exclusion algorithm, for which mutual exclusion and bounded response are proven.> Edward Y. Chang, Zohar Manna, Amir Pnueli |
LICS | 3 |
| 1994 | Temporal Proof Methodologies for Timed Transition SystemsabstractWe extend the specification language of temporal logic, the corresponding verification framework, and the underlying computational model to deal with real-;time properties of reactive systems. The abstract notion of timed transition systems generalizes traditional transition systems conservatively: qualitative fairness requirements are replaced (and superseded) by quantitative lower-bound and upper-bound timing constraints on transitions. This framework can model real-time systems that communicate either through shared variables or by message passing and real-time issues such as timeouts, process priorities (interrupts), and process scheduling. We exhibit two styles for the specification of real-time systems. While the first approach uses time-bounded versions of the temporal operators, the second approach allows explicit references to time through a special clock variable. Corresponding to the two styles of specification, we present and compare two different proof methodologies for the verification of timing requirements that are expressed in these styles. For the bounded-operator style, we provide a set of proof rules for establishing bounded-invariance and bounded-responce properties of timed transition systems. This approach generalizes the standard temporal proof rules for verifying invariance and response properties conservatively. For the explicit-clock style, we exploit the observation that every time-bounded property is a safety property and use the standard temporal proof rules for establishing safety properties. Thomas A. Henzinger, Zohar Manna, Amir Pnueli |
Inf. Comput. | 3 |
| 1994 | Proving Partial Order Properties
Doron A. Peled, Amir Pnueli |
Theor. Comput. Sci. | 2 |
| 1993 | A Decision Algorithm for Full Propositional Temporal Logic
Yonit Kesten, Zohar Manna, Hugh McGuire, Amir Pnueli |
CAV | 4 |
| 1993 | Reachability Analysis of Planar Multi-limear Systems
Oded Maler, Amir Pnueli |
CAV | 2 |
| 1993 | In and Out of Temporal LogicabstractTwo-way translations between various versions of temporal logic and between temporal logic over finite sequences and star-free regular expressions are presented. The main result is a translation from normal-form temporal logic formulas to formulas that use only future operators. The translation offers a new proof to a theorem claimed by D. Gabbay et al. (1980), stating that restricting temporal logic to the future operators does not impair its expressive power. The theorem is the basis of many temporal proof systems.> Amir Pnueli, Lenore D. Zuck |
LICS | 1 |
| 1993 | Models for Reactivity
Zohar Manna, Amir Pnueli |
Acta Informatica | 2 |
| 1993 | Probabilistic Verification
Amir Pnueli, Lenore D. Zuck |
Inf. Comput. | 1 |
| 1992 | How Vital is Liveness? Verifying Timing Properties of Reactive and Hybrid Systems (Extended Abstract)
Amir Pnueli |
CONCUR | 1 |
| 1992 | System Specification and Refinement in Temporal Logic
Amir Pnueli |
FSTTCS | 1 |
| 1992 | Characterization of Temporal Property Classes
Edward Y. Chang, Zohar Manna, Amir Pnueli |
ICALP | 3 |
| 1992 | What Good Are Digital Clocks?
Thomas A. Henzinger, Zohar Manna, Amir Pnueli |
ICALP | 3 |
| 1991 | Specifying and Proving Serializability in Temporal LogicabstractSerializability of database transactions is first defined within the framework of linear temporal logic. For commutativity-based serializability, an alternative specification is given in a temporal logic whose semantic interpretation is especially tailored for reasoning about equivalence sequences of histories. The alternative specification method is given in ISTL* and is limited to the specification of concurrency control algorithms based on commutativity. A formal verification system for serializability that uses classical logic reasoning is provided. Within it, proving serializability of transactions executing a concurrency control algorithm is done along the same lines as proving properties of concurrent programs. Serializability for the multiversion-timestamp algorithm is verified.> Doron A. Peled, Shmuel Katz, Amir Pnueli |
LICS | 3 |
| 1991 | On the Faithfulness of Formal Models
Zohar Manna, Amir Pnueli |
MFCS | 2 |
| 1991 | Temporal Proof Methodologies for Real-time Systemsabstract. We extend the specification language of temporal logic, the corresponding verification framework, and the underlying computational model to deal with real-time properties of concurrent and reactive systems. A global, discrete, and asynchronous clock is incorporated into the model by defining the abstract notion of a real-time transition system as a conservative extension of traditional transition systems: qualitative fairness requirements are replaced (and superseded) by quantitative lower-bound and upperbound real-time requirements for transitions. We show how to model real-time systems that communicate either through shared variables or by message passing, and how to represent the important real-time constructs of priorities (interrupts), scheduling, and timeouts in this framework. Two styles for the specification of real-time properties are presented. The first style uses bounded versions of the temporal operators; the real-time requirements expressed in this style are classified ... Thomas A. Henzinger, Zohar Manna, Amir Pnueli |
POPL | 3 |
| 1991 | Communication with Directed Logic Variables
Alon Kleinman, Yael Moscowitz, Amir Pnueli, Ehud Shapiro |
POPL | 3 |
| 1991 | Completing the Temporal Picture
Zohar Manna, Amir Pnueli |
Theor. Comput. Sci. | 2 |
| 1990 | Tight Bounds on the Complexity of Cascaded Decomposition of AutomataabstractExponential upper and lower bounds on the size of the cascaded (Krohn-Rhodes) decomposition of automata are given. These results are used to obtain elementary algorithms for various translations between automata and temporal logic, where the previously known translations were nonelementary. The relevance of the result is discussed.> Oded Maler, Amir Pnueli |
FOCS | 2 |
| 1990 | Distributed Reactive Systems Are Hard to SynthesizeabstractThe problem of synthesizing a finite-state distributed reactive system is considered. Given a distributed architecture A, which comprises several processors P/sub 1/, . . ., P/sub k/ and their interconnection scheme, and a propositional temporal specification phi , a solution to the synthesis problem consists of finite-state programs Pi /sub 1/, . . ., Pi /sub k/ (one for each processor), whose joint (synchronous) behavior maintains phi against all possible inputs from the environment. Such a solution is referred to as the realization of the specification phi over the architecture A. Specifically, it is shown that the problem of realizing a given propositional specification over a given architecture is undecidable, and it is nonelementarily decidable for the very restricted class of hierarchical architectures. An extensive characterization of architecture classes for which the realizability problem is elementarily decidable and of classes for which it is undecidable is given.> Amir Pnueli, Roni Rosner |
FOCS | 1 |
| 1990 | Proving Partial Order Liveness Properties
Doron A. Peled, Amir Pnueli |
ICALP | 2 |
| 1990 | Explicit Clock Temporal LogicabstractThe authors present a single exponent decision procedure for the validity of XCTL formulas, and a double exponent decision procedure for the validity of XCTL formulas over finite state programs (model checking). The expressive power of XCTL is compared with that of some other logics proposed for the expression of real time properties. It is shown that it is incomparable with the expressive power of the recently proposed logic TPTL (timed propositional temporal logic).> Eyal Harel, Orna Lichtenstein, Amir Pnueli |
LICS | 3 |
| 1990 | A Hierarchy of Temporal PropertiesabstractWe propose a classification of temporal properties into a hierarchy.The classes of the hierarchy are characterized through four views: a language-theoretic view, a topologica1 view, the temporal logic view, and an automata view.In the topological view, the considered hierarchy coincides with the two lower levels of the Bore1 hierarchy, starting with the closed and open sets.For properties that are expressible by temporal logic and predicate automata, we provide a syntactic characterization of the formulae and automata that specify properties in the different classes.We relate this classification to the well known safety-[iweness classification, and show that in some sense the two are orthogonal to one another. Zohar Manna, Amir Pnueli |
PODC | 2 |
| 1990 | STATEMATE: A Working Environment for the Development of Complex Reactive SystemsabstractSTATEMATE is a set of tools, with a heavy graphical orientation, intended for the specification, analysis, design, and documentation of large and complex reactive systems. It enables a user to prepare, analyze, and debug diagrammatic, yet precise, descriptions of the system under development from three interrelated points of view, capturing structure, functionality, and behavior. These views are represented by three graphical languages, the most intricate of which is the language of statecharts, used to depict reactive behavior over time. In addition to the use of statecharts, the main novelty of STATEMATE is in the fact that it understands the entire descriptions perfectly, to the point of being able to analyze them for crucial dynamic properties, to carry out rigorous executions and simulations of the described system, and to create running code automatically. These features are invaluable when it comes to the quality and reliability of the final outcome.> David Harel, Hagi Lachover, Amnon Naamad, Amir Pnueli, Michal Politi, Rivi Sherman, Aharon Shtull-Trauring, Mark B. Trakhtenbrot |
IEEE Trans. Software Eng. | 4 |
| 1989 | Completing the Temporal Picture
Zohar Manna, Amir Pnueli |
ICALP | 2 |
| 1989 | On the Synthesis of an Asynchronous Reactive Module
Amir Pnueli, Roni Rosner |
ICALP | 1 |
| 1989 | Specification and verification of VLSI systemsabstractA hardware verification approach based on linear time temporal logic is described. The authors show that by introducing appropriate abbreviations into linear temporal logic, which facilitate the expression of precise timing constraints, they obtain a very convenient language for the description of the behavior of hardware systems, and for the development of a formal verification system used in proving that designs meet their specifications. The authors automatically verified several sequential circuits. As an example they describe the specification and verification of an edge-triggered D-type flip-flop and the discovery of an error in a published specification. It is demonstrated that the approach is practical and offers a viable alternative to simulation. Comparison is made with other formal methods.> Asher Wilk, Amir Pnueli |
ICCAD | 2 |
| 1989 | On the Synthesis of a Reactive ModuleabstractWe consider the synthesis of a reactive module with input x and output y, which is specified by the linear temporal formula @@@@(x, y). We show that there exists a program satisfying @@@@ iff the branching time formula (∀x) (∃y) A@@@@(x, y) is valid over all tree models. For the restricted case that all variables range over finite domains, the validity problem is decidable, and we present an algorithm for constructing the program whenever it exists. The algorithm is based on a new procedure for checking the emptiness of Rabin automata on infinite trees in time exponential in the number of pairs, but only polynomial in the number of states. This leads to a synthesis algorithm whose complexity is double exponential in the length of the given specification. Amir Pnueli, Roni Rosner |
POPL | 1 |
| 1988 | STATEMATE; A Working Environment for the Development of Complex Reactive Systems
David Harel, Hagi Lachover, Amnon Naamad, Amir Pnueli, Michal Politi, Rivi Sherman, Aharon Shtull-Trauring |
ICSE | 4 |
| 1988 | The grammar of dimensions in machine drawings
Dov Dori, Amir Pnueli |
Comput. Vis. Graph. Image Process. | 2 |
| 1987 | On the Formal Semantics of Statecharts (Extended Abstract)
David Harel, Amir Pnueli, Jeanette P. Schmidt, Rivi Sherman |
LICS | 2 |
| 1987 | A Hierarchy of Temporal Properties (Abstract)abstractWe propose a classification of temporal properties into a hierarchy which refines the known safety-liveness classification of properties. The new classification recognizes the classes of safety, guarantee, persistence, fairness, and hyper-fairness. The classification suggested here is based on the different ways a property of finite computations can be extended into a property of infinite computations. For properties that are expressible by temporal logic and predicate automata, we provide a syntactic characterization of the formulae and automata that specify properties in the different classes. We consider the verification of properties over a given program, and provide a unique proof principle for each class. Zohar Manna, Amir Pnueli |
PODC | 2 |
| 1987 | Specification and Verification of Concurrent Programs By Forall-Automataabstract∀-automata are non-deterministic finite-state automata over infinite sequences. They differ from conventional automata in that a sequence is accepted if all runs of the automaton over the sequence are accepting. These automata are suggested as a formalism for the specification and verification of temporal properties of concurrent programs. It is shown that they are as expressive as extended-temporal-logic (ETL), and in some cases provide a more compact representation of properties than temporal logic. A structured diagram notation is suggested for the graphical representation of these automata. A single sound and complete proof rule is presented for proving that all computations of a program have the property specified by a ∀-automaton. Zohar Manna, Amir Pnueli |
POPL | 2 |
| 1987 | Specification and Implementation of Concurrently Accessed Data Structures: An Abstract Data Type Approach
S. Kaplan, Amir Pnueli |
STACS | 2 |
| 1987 | Very High Level Concurrent ProgrammingabstractConcurrent systems are typically large and complex, requiring long, development time and much labor. They are, therefore, prime candidates for simplification and automation of the design and programming process. Their major application areas include real time systems, operating systems and cooperative computation. New applications are emerging with the trends towards wide usage of personal computers connected in a network and towards use of parallel processing in supercomputer architectures. Noah S. Prywes, Boleslaw K. Szymanski, Amir Pnueli |
IEEE Trans. Software Eng. | 4 |
| 1986 | Probabilistic Verification by Tableaux
Amir Pnueli, Lenore D. Zuck |
LICS | 1 |
| 1986 | A Choppy Logic
Roni Rosner, Amir Pnueli |
LICS | 2 |
| 1986 | A Really Abstract Concurrent Model and its Temporal LogicabstractIn this paper we advance the radical notion that a computational model based on the reals provides a more abstract description of concurrent and reactive systems, than the conventional integers based behavioral model of execution sequences. The real model is studied in the setting of temporal logic, and we illustrate its advantages by providing a fully abstract temporal semantics for a simple concurrent language, and an example of verification of a concurrent program within the real temporal logic defined here. It is shown that, by imposing the crucial condition of finite variability, we achieve a balanced formalism that is insensitive to finite stuttering, but can recognize infinite stuttering, a distinction which is essential for obtaining a fully abstract semantics of non-terminating processes. Among other advantages, going into real-based semantics obviates the need for the controversial representation of concurrency by interleaving, and most of the associated fairness constraints. Howard Barringer, Ruurd Kuiper 0001, Amir Pnueli |
POPL | 3 |
| 1986 | Verification of Multiprocess Probabilistic Protocols
Amir Pnueli, Lenore D. Zuck |
Distributed Comput. | 1 |
| 1985 | Linear and Branching Structures in the Semantics and Logics of Reactive Systems
Amir Pnueli |
ICALP | 1 |
| 1985 | Checking That Finite State Concurrent Programs Satisfy Their Linear SpecificationabstractWe present an algorithm for checking satisfiability of a linear time temporal logic formula over a finite state concurrent program. The running time of the algorithm is exponential in the size of the formula but linear in the size of the checked program. The algorithm yields also a formal proof in case the formula is valid over the program. The algorithm has four versions that check satisfiability by unrestricted, impartial, just and fair computations of the given program. Orna Lichtenstein, Amir Pnueli |
POPL | 2 |
| 1984 | A Hardware Implementation of the CSP Primitives and its Verification
Dorit Ron, Flavia Rosemberg, Amir Pnueli |
ICALP | 3 |
| 1984 | Verification of Multiprocess Probabilistic ProtocolsabstractA new probabilistic symmetric solution to the n processes mutual exclusion problem is presented. The algorithm is verified formally using the extreme fairness approach to probabilistic verification. Amir Pnueli, Lenore D. Zuck |
PODC | 1 |
| 1984 | Temporal Verification of Carrier-Sense Local Area Network ProtocolsabstractWe examine local area network protocols and verify the correctness of two representative algorithms using temporal logic. We introduce an interval temporal logic that allows us to make assertions of the form “in the next k units, X holds.” This logic encodes intuitive arguments about contention protocols quite directly. We present two proofs of an Ethernet-like contention protocol, one using the interval temporal logic and one using classical temporal logic. We also verify a contention-free protocol using an invariant that seems to have wide applicability for such protocols. Dennis E. Shasha, Amir Pnueli, W. Ewald |
POPL | 2 |
| 1984 | Now You May Compose Temporal Logic SpecificationsabstractA compositional temporal logic proof system for the specification and verification of concurrent programs is presented. Versions of the system are developed for shared variables and communication based programming languages that include procedures. Howard Barringer, Ruurd Kuiper 0001, Amir Pnueli |
STOC | 3 |
| 1984 | Adequate Proof Principles for Invariance and Liveness Properties of Concurrent Programs
Zohar Manna, Amir Pnueli |
Sci. Comput. Program. | 2 |
| 1984 | Verification of Probabilistic ProgramsabstractA general method for proving properties of probabilistic programs is presented. This method generalizes the intermediate assertion method in that it extends a given assertion on the output distribution into an invariant assertion on all intermediate distributions, too. The proof method is shown to be sound and complete for programs which terminate with probability 1. A dual approach, based on the expected number of visits in each intermediate state, is also presented. All the methods are presented under the uniform framework which considers a probabilistic program as a discrete Markov process. Micha Sharir, Amir Pnueli, Sergiu Hart |
SIAM J. Comput. | 2 |
| 1984 | Is the Interesting Part of Process Logic Uninteresting? A Translation from PL to PDLabstractWith the (necessary) condition that atomic programs in process logic (PL) be binary, we present an algorithm for the translation of a PL formula p into a program $\zeta (p)$ of propositional dynamic logic (PDL) such that a finite path satisfies p if it belongs to $\zeta (p)$. This reduction has two immediate corollaries: 1) validity in this PL can be tested by testing validity of formulas in PDL; 2) all state properties expressible in this PL are expressible in PDL. The translation, however, is of nonelementary time complexity.The significance of the result to the search for natural and powerful logics of programs is discussed. Rivi Sherman, Amir Pnueli, David Harel |
SIAM J. Comput. | 2 |
| 1984 | Fair Termination Revisited-With Delay
Krzysztof R. Apt, Amir Pnueli, Jonathan Stavi |
Theor. Comput. Sci. | 2 |
| 1984 | Symmetric and Economical Solutions to the Mutual Exclusion Problem in a Distributed System
Shimon Cohen 0002, Daniel Lehmann 0001, Amir Pnueli |
Theor. Comput. Sci. | 3 |
| 1984 | A Linear-History Semantics for Languages for Distributed Programming
Nissim Francez, Daniel Lehmann 0001, Amir Pnueli |
Theor. Comput. Sci. | 3 |
| 1984 | Automatic program generation in distributed cooperative computationabstractDescribes the use of a very high-level equational language and distributed processing in a methodology for the development of large-scale systems in natural and social sciences, or engineering. The methodology denoted as cooperative computation, consists of dividing the labour among a number of organizationally and geographically dispersed groups, with each responsible for a respective local area, and the integration of the local areas into a global system. With an equational language, the user is able to express computations in terms of equations that are commonly used in science and engineering, without the detail required in programming computers. Object programs are then produced automatically through the use of a program generator and a configurator. The methodology is discussed primarily through an example, using the model language applied in environment of Project Link. Noah S. Prywes, Amir Pnueli |
IEEE Trans. Syst. Man Cybern. | 2 |
| 1983 | Symmetric and Economical Solutions to the Mutual Exclusion Problem in a Distributed System (Extended Abstract)
Shimon Cohen 0002, Daniel Lehmann 0001, Amir Pnueli |
ICALP | 3 |
| 1983 | Proving Precedence Properties: The Temporal Way
Zohar Manna, Amir Pnueli |
ICALP | 2 |
| 1983 | How to Cook a Temporal Proof System for Your Pet LanguageabstractAn abstract temporal proof system is presented whose program-dependent part has a high-level interface with the programming language actually studied. Given a new language, it is sufficient to deline the interface notions of atomic transitions, justice, and fairness in order to obtain a full temporal proof system for this language. This construction is particularly useful for the analysis of concurrent systems. We illustrate the construction on the shared-variable model and on CSP. The generic proof system is shown to be relatively complete with respect to pure first-order temporal logic. Zohar Manna, Amir Pnueli |
POPL | 2 |
| 1983 | On the Extremely Fair Treatment of Probabilistic AlgorithmsabstractA proof system based on linear temporal logic for the qualitative verification of concurrent probabilistic programs is proposed. The concept of extreme fairness is introduced as an approximation to the notion of probabilistic executions. The proof system proposed is shown to be relatively complete with respect to validity over all extremely fair computations. The proof methodology is demonstrated by proving correctness of a new probabilistic algorithm for solving the mutual exclusion problem ([CLP]). Amir Pnueli |
STOC | 1 |
| 1983 | The Temporal Logic of Branching Time
Mordechai Ben-Ari, Amir Pnueli, Zohar Manna |
Acta Informatica | 2 |
| 1983 | Propositional Dynamic Logic of Nonregular Programs
David Harel, Amir Pnueli, Jonathan Stavi |
J. Comput. Syst. Sci. | 2 |
| 1983 | Termination of Probabilistic Concurrent ProgramabstractThe asynchronous execution behavior of several concurrent processes, which may use randomization, is studied.Viewing each process as a discrete Markov chain over the set of common execution states, necessary and sufficient conditions are given for the processes to converge almost surely to a given set of goal states under any fair, but otherwise arbitrary, schedule, provided that the state space is finite.(These conditions can be checked mechanically.)An interesting feature of the proof method is that it depends only on the topology of the transitions and not on the actual values of the probabilities.It is also shown that in this model synchronization protocols that use randomization are in certain cases no more powerful than deterministic protocols.This is demonstrated by (1) establishing lower bounds, similar to those known for deterministic protocols, on the size of a shared variable necessary to ensure mutual exclusion and lockout-free behavior of a "randomized" protocol and ( 2) showing that no fully symmetric "randomized" protocol can ensure mutual exclusion and freedom from lockout. Sergiu Hart, Micha Sharir, Amir Pnueli |
ACM Trans. Program. Lang. Syst. | 3 |
| 1983 | Compilation of Nonprocedural Specifications into Computer ProgramsabstractThe paper describes the compilation of a program specification, written in the very high level nonprocedural MODEL language, into an object, PL/1 or Cobol, procedural language program. Nonprocedural programming languages are descriptive and devoid of procedural controls. They are therefore easier to use and require less programming skills than procedural languages. The MODEL language is briefly presented and illustrated followed by a description of the compilation process. An important early phase in the compilation is the representation of the specification by a dependency graph, denoted as array graph, which expresses the data flow interdependencies between statements. Two classes of algorithms which utilize this graph are next described. The first class checks various completeness, nonambiguity, and consistency aspects of the specification. Upon detecting any problems, the system attempts some automatic correcting measures which are reported to the user, or alternately, when no corrections appear as reasonable, it reports the error and solicits a modification from the user. The second class of algorithms produces an intermediate design of an object program in a language independent form. Finally, PL/1 or Cobol code is generated. Noah S. Prywes, Amir Pnueli |
IEEE Trans. Software Eng. | 2 |
| 1982 | Termination of Probabilistic Concurrent ProgramsabstractThe asynchronous execution behavior of several concurrent processes, which may use randomization, is studied. Viewing each process as a discrete Markov chain over the set of common execution states, we give necessary and sufficient conditions for the processes to converge almost surely to a given set of goal states, under any fair, but otherwise arbitrary schedule, provided that the state space is finite. (These conditions can be checked mechanically.) An interesting feature of the proof method is that it depends only on the topology of the transitions and not on the actual values of the probabilities. We also show that in our model synchronization protocols that use randomization are in certain cases no more powerful than deterministic protocols. This is demonstrated by (a) Proving lower bounds on the size of a shared variable necessary to ensure mutual exlusion and lockout-free behavior of the protocol; and (b) Showing that no fully symmetric 'randomized' protocol can ensure mutual exclusion and freedom from lockout. Sergiu Hart, Micha Sharir, Amir Pnueli |
POPL | 3 |
| 1982 | Is the Interesting Part of Process Logic Uninteresting - A Translation from PL to PDLabstractWith the (necessary) condition that atomic programs in PL be binary, we present an algorithm for the translation of a PL formula X into a PDL program τ (X) such that a finite path satisfies X iff it belongs to τ (X). This reduction has two immediate corollaries: 1) validity in this PL can be tested by testing validity of formulas in PDL; 2) all finite-path program properties expressible in this PL are expressible in PDL.The translation, however, seems to be of non-elementary time complexity. The significance of the result to the search for natural and powerful logics of programs is discussed. Rivi Sherman, Amir Pnueli, David Harel |
POPL | 2 |
| 1982 | Deterministic Propositional Dynamic Logic: Finite Models, Complexity, and Completeness
Mordechai Ben-Ari, Joseph Y. Halpern, Amir Pnueli |
J. Comput. Syst. Sci. | 3 |
| 1981 | Propositional Dynamic Logic of Context-Free ProgramsabstractThe borderline between decidable and undecidable Propositional Dynamic Logic (PDL) is sought when iterative programs represented by regular expressions are augmented with increasingly more complex recursive programs represented by context-free languages. The results in this paper and its companion [HPS] indicate that this line is extremely close to the original regular PDL. The main result of the present paper is: The validity problem for PDL with additional programs αΔ(β)γΔ for regular α, β and γ, defined as Uiαi; β; γi, is Π11-complete. One of the results of [HPS] shows that the single program AΔ(B) AΔ for atomic A and B is actually sufficient for obtaining Π11- completeness. However, the proofs of this paper use different techniques which seem to be worthwhile in their own right. David Harel, Amir Pnueli, Jonathan Stavi |
FOCS | 2 |
| 1981 | Finite Models for Deterministic Propositional Dynamic Logic
Mordechai Ben-Ari, Joseph Y. Halpern, Amir Pnueli |
ICALP | 3 |
| 1981 | Impartiality, Justice and Fairness: The Ethics of Concurrent Termination
Daniel Lehmann 0001, Amir Pnueli, Jonathan Stavi |
ICALP | 2 |
| 1981 | Realizing an Equational Specification
Amir Pnueli, R. Zarhi |
ICALP | 1 |
| 1981 | The Temporal Logic of Branching TimeabstractA temporal language and system are presented which are based on branching time structure. By the introduction of symmetrically dual sets of temporal operators, it is possible to discuss properties which hold either along one path or along all paths. Consequently it is possible to express in this system all the properties that were previously expressible in linear time or branching time systems. We present an exponential decision procedure for satisfiability in the language based on tableaux methods, and a complete deduction system. As associated temporal semantics is illustrated for both structured and graph representation of programs. Mordechai Ben-Ari, Zohar Manna, Amir Pnueli |
POPL | 3 |
| 1981 | Automatic Programming of Finite State Linear ProgramsabstractFinite State Linear Programs (FSLP) are introduced to model simple data processing applications. Essentially these are finite automata with the added capability of performing linear operations on a set of registers and the input. Algorithmic constructions are given to test equivalence of FSLP programs, and to minimize the number of states and registers. Linear algebraic methods are used for the register minimization procedure (and its correctness proof). Amir Pnueli, Giora Slutzki |
SIAM J. Comput. | 1 |
| 1981 | The Temporal Semantics of Concurrent Programs
Amir Pnueli |
Theor. Comput. Sci. | 1 |
| 1980 | A Linear History Semantics for Distributed Languages (Extended Abstract)abstractA denotational semantics is given for a distributed language based on communication (CSP). The semantics uses linear sequences of communications to record computations; for any well formed program segment the semantics is a relation between attainable states and the communication sequences needed to attain these states. In binding two or more processes we match and merge the communication sequences assumed by each process to obtain a sequence and State of the combined process. The approach taken here is distinguished by relatively simple semantic domains and ordering. Nissim Francez, Daniel Lehmann 0001, Amir Pnueli |
FOCS | 3 |
| 1980 | On the Temporal Analysis of FairnessabstractThe use of the temporal logic formalism for program reasoning is reviewed. Several aspects of responsiveness and fairness are analyzed, leading to the need for an additional temporal operator: the 'until' operator -U. Some general questions involving the 'until' operator are then discussed. It is shown that with the addition of this operator the temporal language becomes expressively complete. Then, two deductive systems DX and DUX are proved to be complete for the languages without and with the new operator respectively. Dov M. Gabbay, Amir Pnueli, Saharon Shelah, Jonathan Stavi |
POPL | 2 |
| 1980 | Synchronous Schemes and Their Decision ProblemsabstractA class of schemes called synchronous schemes is defined. A synchronous scheme can have several variables, but all the active ones are required to keep a synchronized rate of computation as measured by the height of their respective Herbrand values. A "reset" statement, which causes all the variables to restart a new computation, is admitted. It is shown that equivalence, convergence, and other properties are decidable for schemes in this class. The class of synchronous schemes contains, as special cases, the known decidable classes of Ianov schemes, one-variable schemes with resets, and progressive schemes. Zohar Manna, Amir Pnueli |
POPL | 2 |
| 1979 | The Modal Logic of Programs
Zohar Manna, Amir Pnueli |
ICALP | 2 |
| 1979 | Use of a Nonprocedural Specification Language and Associated Program Generator in Software DevelopmentabstractThe Model II language and the associated program generator are used to explain and illustrate the use of very high level nonprocedural languages for computer programming. The effect of a very high level language is obtained in Model II through the elimination of procedural and control facilities that exist in high level programming languages such as PL/I or Cobol. In particular, the statements may be given in any order and there are no control constructs such as input/output, iterations, and memory allocation. The task of ordering the statements for execution and providing control statements is performed by the automatic program generator. The specification of a program is therefore much shorter (approximately one-fifth) than the equivalent high level procedural language program. Most important, a user need not regard the task of specifying a program as defining a process but rather as describing data and relations. This point of view greatly reduces the computer programming proficiency required of a user. The paper focuses on an example of the use of the language in business data processing, its advantages, and its novelty. It only briefly reviews the methodology incorporated in the existing program generator, a detailed description of which may be found in the references. Noah S. Prywes, Amir Pnueli, S. Shastry |
ACM Trans. Program. Lang. Syst. | 2 |
| 1978 | A Proof Method for Cyclic Programs
Nissim Francez, Amir Pnueli |
Acta Informatica | 2 |
| 1977 | The Temporal Logic of ProgramsabstractA unified approach to program verification is suggested, which applies to both sequential and parallel programs. The main proof method suggested is that of temporal reasoning in which the time dependence of events is the basic concept. Two formal systems are presented for providing a basis for temporal reasoning. One forms a formalization of the method of intermittent assertions, while the other is an adaptation of the tense logic system Kb, and is particularly suitable for reasoning about concurrent programs. Amir Pnueli |
FOCS | 1 |
| 1977 | Simple Programs and Their Decision Problems
Amir Pnueli, Giora Slutzki |
ICALP | 1 |
| 1977 | A Complete Axiomatic System for Proving Deductions about Recursive ProgramsabstractDenoting a version of Hoare's system for proving partial correctness of recursive programs by H, we present an extension D which may be thought of as H υ {@@@@,@@@@,@@@@,@@@@} υ H-1, including the rules of H, four special purpose rules and inverse rules to those of Hoare. D is shown to be a complete system (in Cook's sense) for proving deductions of the form σ1,....σn @@@@ σ over a language, the wff's of which are assertions in some assertion language L and partial correctness specifications of the form p(α)q. All valid formulae of L are taken as axioms of D. It is shown that D is sufficient for proving partial correctness, total correctness and program equivalence as well as other important properties of programs, the proofs of which are impossible in H. The entire presentation is worked out in the framework of nondeterministic programs employing iteration and mutually recursive procedures. David Harel, Amir Pnueli, Jonathan Stavi |
STOC | 2 |
| 1977 | Backtracking in Recursive Computations
Nissim Francez, Boris Klebansky, Amir Pnueli |
Acta Informatica | 3 |
| 1977 | A Direct Algorithm for Checking Equivalence of LL(k) Grammars
Tmima Olshansky, Amir Pnueli |
Theor. Comput. Sci. | 2 |
| 1974 | Axiomatic Approach to Total Correctness of Programs
Zohar Manna, Amir Pnueli |
Acta Informatica | 2 |
| 1973 | Decidable Properties of Monadic Functional SchemasabstractA class of (monadic) functional schemas which properly includes “Ianov” flowchart schemas is defined. It is shown that the termination, divergence, and freedom problems for functional schemas are decidable. Although it is possible to translate a large class of non-free functional schemas into equivalent free functional schemas, it is shown that in general this cannot be done. It is also shown that the equivalence problem for free functional schemas is decidable. Most of the results are obtained from well-known results in formal languages and automata theory. Edward A. Ashcroft, Zohar Manna, Amir Pnueli |
J. ACM | 3 |
| 1972 | Permutation Graphs and Transitive GraphsabstractA graph G with vertex set N = {1, 2, .-. , n} is called a permutation graph there exists a permutation P on N such that for i,j E N, (i -j)[P-'(i) -P-'(j)] < 0 if ar only if i and j are joined by an edge in G.A structural relationship is established between permutation graphs and transitive graph An algorithm for determining whether a given graph is a permutation graph is given.Efficie, algorithms for finding a maximum size clique and a minimum coloration of transitive grapl are presented.These algorithms are then shown to be applicable in solving problems in memo] allocation and circuit layout. Shimon Even, Amir Pnueli, Abraham Lempel |
J. ACM | 2 |
| 1971 | Marked Directed Graphs
Frederic G. Commoner, Anatol W. Holt, Shimon Even, Amir Pnueli |
J. Comput. Syst. Sci. | 4 |
| 1970 | Formalization of Properties of Functional ProgramsabstractThe problems of convergence, correctness, and equivalence of computer programs can be formulated by means of the satisfiability or validity of certain first-order formulas. An algorithm is presented for constructing such formulas for functional programs, i.e. programs defined by LISP-like conditional recursive expressions. Zohar Manna, Amir Pnueli |
J. ACM | 2 |
| 1969 | Formalization of Properties of Recursively Defined FunctionsabstractThis paper is concerned with the relationship between the convergence, correctness and equivalence of recursively defined functions and the satisfiability (or unsatisfiability) of certain first-order formulas. Zohar Manna, Amir Pnueli |
STOC | 2 |